0xdec on v2.0a
More WIP (compare)
0xdec on v2.0a
WIP migration + v2.0a (compare)
esden on master
Fix formatting, typos, grammar … (compare)
kbob on master
Improve audio clock calculation. Experiment with different color… Added bit definitions for the g… and 1 more (compare)
esden on master
Removed digital volume up/down … (compare)
esden on master
Updated PKL. Added MEMS microphone input. (compare)
esden on master
Added FPGA. (iCEBreaker circuit… (compare)
esden on master
Added STM32 symbol library. Added 1Bytsy schematic to the 1… (compare)
esden on master
Connected the audio sense signa… (compare)
Sausage radar. Simple doppler radar that fits into a sausage can. Named after "Wurstblinker" from the german movie "Werner".
mon srst enable
setting? Usually you can not access the board due to code that is making it inaccessible. For example if you set your clock PLL settings so that the device is being heavily overclocked the device seems to be "bricked" but actually all you need to do is to power it on with reset held to prevent the pll from being configured.
monitor connect_srst enable
which is mon connect enable
in short.
I am using MSYS to (try) building libopencm3 for the 1Bitsy board. I get the following error:
c:/arm/gcc/bin/make --directory=lib/stm32/f4 SRCLIBDIR="c:/libopencm3/lib"
make[1]: Entering directory 'c:/libopencm3/lib/stm32/f4'
make[1]: No rule to make target '/usr/lib/gcc/arm-none-eabi/7.2.1/include/stdint.h', needed by 'adc.o'. Stop.
make[1]: Leaving directory 'c:/libopencm3/lib/stm32/f4'
make: [makefile:64: lib/stm32/f4] Error 2
Can anyone help in resolving this error?
Thanks
arm-none-eabi-gdb
and enter target extended-remote /dev/tty.usbmodem7AB878B1
GDB simply hangs and never comes back. Any suggestions?