These are chat archives for BinPy/BinPy

Oct 2015
Salil Kapur
Oct 06 2015 11:01
Both look equally lucrative. Can we try to have a mix of both. Of course we will approach them one by one. I think we can for now build a strong algorithmic base which can later on be used as modules for generating verilog code or something on the lines of MyHDL. This can provide a complete solution from different pre-developed modules to a synthesizing circuits, which I think is missing in current libraries/software. What do you think?