@alltheblinkythings the thing I have discovered is that there is a level 14 IRQ that is not documented that is used by the wifi core for servicing (I suspect for hardware) that causes the issue. If you don't mask it, it messes up bitbanging. If you do mask it, then you are in unsupported territory. If you have it masked long enough for this IRQ to trigger twice, the chip resets. Once is ok. How long is too long? Don't know and the devs won't say. They just say its unsupported and that use another method.
If the Uart can't maintain consistency without masking this interrupt, then it will never be reliable.
There is another method using i2C features, but my understanding is that this is software, but the devs have stated that it will be supported and timing accurate without the need to mask the low level WiFi irq. Since they own both pieces and don't expose the details, we have to trust them, I guess ;-/