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  • Nov 26 23:25
    c-thaler commented #352
  • Nov 26 12:25
    Dolu1990 commented #352
  • Nov 26 12:21
    Dolu1990 commented #355
  • Nov 26 12:21
    Dolu1990 closed #355
  • Nov 26 12:21

    Dolu1990 on dev

    fix #355 (compare)

  • Nov 26 11:26
    Dolu1990 commented #357
  • Nov 26 09:18
    distributed opened #357
  • Nov 20 23:52
    kleinai commented #356
  • Nov 20 19:29
    Dolu1990 commented #356
  • Nov 20 19:27
    Dolu1990 commented #356
  • Nov 20 17:19
    kleinai commented #356
  • Nov 18 03:12
    kleinai opened #356
  • Nov 17 20:11
    kaofishy opened #355
  • Nov 14 10:26

    Dolu1990 on dev

    Axi4SharedToBRAM byte mask unsu… SInt abs moved to implicit func… (compare)

  • Nov 13 19:18

    svancau on dev

    Fix verilator backend for GCC 10 (compare)

  • Nov 13 19:12
    svancau added as member
  • Nov 13 14:26
    Dolu1990 commented #353
  • Nov 12 01:45
    pdaxian opened #354
  • Nov 10 02:54
    wswslzp closed #342
  • Nov 09 08:14
    wswslzp commented #353
Ncerzzk
@Ncerzzk
Yeah,thanks. It can work in Mem. May be I could get the reg name in other place.
Dolu1990
@Dolu1990
@jijingg
About drop/dropHigh what's about dropLow/dropHigh ?
agentdavo
@agentdavo_twitter
@jijingg comprehensive BMB chapter would be awesome! :-)
Dolu1990
@Dolu1990
about BMB i did some rework into its' parametrization to have per source ID parameters, to allow properly track features usages
Winston Lowe
@wel97459
In the FSM is there a way to have WhenIsNext run once, I would think that WhenIsActive that the code in the WhenIsNext should not continue to have an effect.
        val PaletteGetAndStore: State = new State {
            whenIsNext {
                when(!StateInit) {
                    ptr1 := 0x2100
                    ptr2 := 0x2101
                    ptr3 := 0x3fff
                }
            }

            whenIsActive {
                StateInit:= True
                ptr1 := ptr1 + 2
                ptr2 := ptr2 + 2
                ptr3 := ptr3 + 1
                when(ptr3 =/= 0x3fff){
                    Palettes(ptr3.resize(4)) := Data16.asUInt
                }
                when(ptr3 === 15) {
                    StateInit:= False
                    goto(SpriteInit)
                }
            }
        }
this works.
jijingg
@jijingg

@Dolu1990 i did drop/dropHigh follow the habit of Scala drop/dropRight, and take/takeHigh also have the same situation, but dropLow/takeLow may be more intuitive , so there have two solution

  • replace drop/take bydropLow/takeLow
  • add dropLow/takeLow and keep drop/take for short

which you prefer?

jijingg
@jijingg
@agentdavo_twitter I haven't used BMB yet ,But I think it should be similar to AMBA. If necessary, consider adding it later
Dolu1990
@Dolu1990
@wel97459 Hmm, what's about using onEntry ?
Winston Lowe
@wel97459
i'll try that thanks @Dolu1990
Dolu1990
@Dolu1990
@jijingg For me, add dropLow/takeLow and keep drop/take for short is fine
Also, it keep backward compatibility
jijingg
@jijingg
ok
Winston Lowe
@wel97459
I'm working on a tilemap and sprite engine that will draw to an LCD
Dolu1990
@Dolu1990
About Bmb, it is kind of a middle ground between AXI4 and Avalon, which support invalidation based coherency
Winston Lowe
@wel97459
Picture of a Tile and Sprite engine I'm working on. And testing it out with ventilator and SDL2.
image.png
Winston Lowe
@wel97459
image.png
Winston Lowe
@wel97459
10 Sprites on a scan line, and a max of 40 total in a frame
bellaz89
@bellaz89
Very cool!
chwise
@chwise
do we have some examples/demos with a little complex reference model based on SpinalSim?
chwise
@chwise
I mean that input data of dut are different with the output(maybe trimmed some input data), not like fifo. That needs a reference model for verification.
Dolu1990
@Dolu1990
@chwise here you can find all the regression tests of SpinalHDL itself, the ones in SpinalSim contain SpinalSim in the file name :
https://github.com/SpinalHDL/SpinalHDL/tree/dev/tester/src/test/scala/spinal/tester/scalatest
Which is based on BmbBridgeTester
which basicly check byte access of a Bmb bridge
chwise
@chwise
Thank you for your share ^^
Dolu1990
@Dolu1990
I think there is a missing access primitive in SpinalSim, (to the already exisiting Int, Long, BigInt) which is to access things as byte array
jijingg
@jijingg
@Dolu1990 I dont catch the meaning, which primitive? dose the toBoolean,toInt, toLong, toBigInt are not enough?
Dolu1990
@Dolu1990
Right, none of them are good for raw data (many bytes)
BigInt is workable, but i'm not sure about the overhead
bellaz89
@bellaz89
+1 for toBytes (or toByteArray)
saahm
@saahm
So basically a List of Int/BigInt;
As soon as you can have an Array of Bytes, you'd maybe want an Array of Words too (thinking about the data that goes around on busses)
What kind of overhead is expected with BigInt?
I'm for toBytes/toByteArray aswell (at least when coming form classical HDL) since thinking in Int/Long/BigInt isnt natrual as compared to Bytes/Vector of Bytes
Dolu1990
@Dolu1990

as soon as you can have an array of bytes, you'd want an array of words maybe too

Right XD

Issue with big int is that there is no proper way to access its byte, or maybe i missed it.

I'm for toBytes/toByteArray aswell (at least when coming form classical HDL) since thinking in Int/Long/BigInt isnt natrual as compared to Bytes/Vector of Bytes

+1

saahm
@saahm
Oh like having a BigInt having 2 bytes in there and you want the upper byte?
Dolu1990
@Dolu1990
right
basicaly, memory bus maniupation aren't good with BigInt
saahm
@saahm
well using BigInt for writing stuff onto a bus or interface isnt too bad, as values can be passed in hex.
or is there something i didnt understand?
its just reading values of an interface and having to deal with a BigInt maybe containing more than one byte of information
saahm
@saahm
@Dolu1990 I'm currently in the process of writing my masters thesis and obviously mentioning SpinalHDL and other existing repositories around it (i.e. VexRiscV). You want to appear with more than your nickname Dolu1990? (Asking for your preference, it doesnt make a big difference for me or my examiners i think).
Oron Port
@soronpo
It is customary to quote the main authors full names when referencing open-source work.
saahm
@saahm
Which I'd had to find first
:D
Dolu1990
@Dolu1990
@saahm Dolu1990 is fine :)
saahm
@saahm
There is also enough open source authors who dont even appear other than with a nickname
Dolu1990
@Dolu1990
Ahhh
Else, it's Charles Papon
saahm
@saahm
Oh, nice :) I'll use this then
I also didnt knew that its common for main author full names. Always learning something huh