set_driving_cellin your SDC to give it a better idea of the port input drive. If you really don't want resizer touching the buffers, then you can set the buffer placement status to
FIXEDand I believe that will prevent resizer from touching it.
Error: instAnalysis unsupported pinFig, seems to come from this section of code
@laurentc2 There is a mode of ioPlacer which uses non-random assignment - it uses an algorithm to place I/O pins such that wire length is minimized. We don't have it active right now because there was an issue where it might place pins too close together and cause routing violations. It depends on a placed design, so to run it, one has to run random IO assignment --> global placement --> non-random IO assignment.
It is not quite what you are asking, but it is better than random. There is probably a way to do place pins using OpenDB commands, but yes, we should make the interface easier to use. I will forward this to the team.
I found out that that some pins were defined in a layers not connected, so it solved my last issue.
But now, I face a new problem : TritonRoute is crashing in the middle of its processing with the message :
post process guides ...
GCELLGRID X -1 DO 48 STEP 14400 ;
GCELLGRID Y -1 DO 87 STEP 14400 ;
terminate called after throwing an instance of 'std::out_of_range'
what(): vector::_M_range_check: __n (which is 10) >= this->size() (which is 10)
0:03.00elapsed 250%CPU 19148memKB
Hope you can help me, I cannot find in the TritonRoute code the line that is crashing ...
Thank you, BRgds,
Error: no ap for AAA/BBBmeans that TritonRoute was unable to find an access point (ap) for cell instance
BBB. This can mean several things, such as 1) TritonRoute cannot find the pin definition in the LEF, 2) the cell is designed such that TritonRoute is unable to make a clean connection to the pin, 3) The location where the instance was placed makes it inaccessible by TritonRoute.
terminate called after throwing an instance of 'std::out_of_range'is definitely a bug. Is it possible to provide a test case? If the problem is reproducible in an open kit like nangate45 or sky130 then it makes it really easy for us to debug. You can open a GitHub issue on the TritonRoute repository and attach the test case if possible. If you use
OpenROAD-flow, you can run
make tritonRoute_issuewhich will create a tar.gz file in the format we use for internal debugging.
I still cannot solve the first issue as I always have the same error with TritonRoute :
Error: no valid pattern for unique instance X1700, refBlock is IV2
pin ordering (with ap):
A (281.48, 138.385) (281.48, 138.415) (281.72, 138.385) (281.72, 138.415)
Z (281.96, 137.535) (281.96, 137.575) (281.96, 137.975) (281.96, 138.015) (281.96, 139.185) (281.96, 139.225)
For the bug, I could bypass it by creating an extra dummy routing layer and it solved it!
I think it comes from one of the code line with : .at(layerNum)
Error: no valid pattern for unique instance X1700means that TritonRoute cannot create a pin access pattern that creates a clean connection to the instance. This occurs with cells that have too high of a pin density, or the pins are too small. This can occur frequently with cells that have less than X1 drive strength. Sometimes it can also occur with X1 strength cells. I recommend adding the cell to the
DONT_USElist in the config file so that Yosys does not try to synthesize to that type of cell, and so that Resizer does not try to resize for that cell.
Hi, i am getting this weird error at the end of the flow, while doing final report:
========================================================================== report_clock_skew -------------------------------------------------------------------------- Error: Internal error in /OpenROAD/src/OpenSTA/search/Crpr.cc:78 missing prev paths.
Any idea what might cause this ? (i do not see any other error in the log file that could explain this)
How to force the cells track, not the metals track ?
@laurentc2 I'm not sure what you're asking, can you elaborate?
TargetDensity=0.2500). Do you have any idea about this error? The screenshot is as follows.
Notice 0: Finished DEF file: ./results/nangate45/comp/2_floorplan.def [INFO] DBU = 2000 [INFO] SiteSize = (380, 2800) [INFO] CoreAreaLxLy = (20140, 22400) [INFO] CoreAreaUxUy = (140220, 140000) [INFO] NumInstances = 491 [INFO] NumPlaceInstances = 407 [INFO] NumFixedInstances = 84 [INFO] NumDummyInstances = 0 [INFO] NumNets = 615 [INFO] NumPins = 1653 [INFO] DieAreaLxLy = (0, 0) [INFO] DieAreaUxUy = (160340, 160000) [INFO] CoreAreaLxLy = (20140, 22400) [INFO] CoreAreaUxUy = (140220, 140000) [INFO] CoreArea = 14121408000 [INFO] NonPlaceInstsArea = 89376000 [INFO] PlaceInstsArea = 3453744000 [INFO] Util(%) = 24.613287 [INFO] StdInstsArea = 3453744000 [INFO] MacroInstsArea = 0 [InitialPlace] Iter: 1 CG Error: 8.22656e-08 HPWL: 43844280 [InitialPlace] Iter: 2 CG Error: 1.18405e-06 HPWL: 25511121 [InitialPlace] Iter: 3 CG Error: 1.09402e-07 HPWL: 20147647 [InitialPlace] Iter: 4 CG Error: 9.91762e-08 HPWL: 19970488 [InitialPlace] Iter: 5 CG Error: 1.15753e-07 HPWL: 19917056 [INFO] FillerInit: NumGCells = 413 [INFO] FillerInit: NumGNets = 615 [INFO] FillerInit: NumGPins = 1653 [INFO] TargetDensity = 0.250000 [INFO] AveragePlaceInstArea = 8485857 [INFO] IdealBinArea = 33943428 [INFO] IdealBinCnt = 416 [INFO] TotalBinArea = 14121408000 [INFO] BinCnt = (16, 16) [INFO] BinSize = (7505, 7350) [INFO] NumBins = 256 [NesterovSolve] Iter: 1 overflow: 0.480216 HPWL: 23894010 [ERROR] RePlAce divergence detected. Please decrease init_density_penalty value (REPL-3) Error: RePlAce terminated with errors.
write_verilogand convert it to spice / CDL. Yosys can do this.