IP Core Library - Published and maintained by the Chair for VLSI Design, Diagnostics and Architecture, Faculty of Computer Science, Technische Universität Dresden, Germany
Paebbels on master
Whitespace cleanup. Added new ClockNetwork componen… Added more config files for com… and 2 more (compare)
mzabeltud on v1.1.2
Memory Test for QM XC6SLX16 SDR… (compare)
mzabeltud on v1.1.2
Memory Test for QM XC6SLX16 SDR… (compare)
mzabeltud on v1.1.2
Fixed line endigns. (compare)
mzabeltud on v1.1.2
Memory Test for QM XC6SLX16 SDR… (compare)
mzabeltud on v1.1.2
Fixed default config for SDRAM … Instantiate tri-state driver fo… Added attribute IOB=true for in… (compare)
mzabeltud on v1.1.2
Added support for different bur… (compare)
project.ps1 --add-ip PoC.arith.prng
command additionally to the poc.ps1
commands.
================================================================================
The PoC-Library - Service Tool
================================================================================
Initializing PoC-Library Service Tool for synthesis
FATAL: An unknown or unhandled exception reached the topmost exception handler!
Exception type: AttributeError
Exception message: 'Namespace' object has no attribute 'Dependencies'
.pyIPCMI
), andlib/pyIPCMI
.my_config.vhdl
per project. It is shared in the parent repository.
my_project.vhdl
is specific to each machine and not intended to be shared with Git.
my_project.vhdl
@qarlosalberto Yes, he will publish the code, when his thesis is in the review phase. I know, we'll annoy a lot of IP core vendors, but on the other side, why do the offer a so simple IP core for ~15,000 €? yes......
pwm
: https://poc-library.readthedocs.io/en/release/search.html?q=pwm&check_keywords=yes&area=default