I am trying to run the /VUnit/vunit/blob/master/vunit/vhdl/verification_components/test/tb_axi_lite_master.vhd (I have my own master instantiated in the TB) and I am always getting a failure due to "core_pkg.vhd line 84". It has something to do with the mock() and unmock() procedures. Commenting them out but that does not help. Where can I gain some extra insight regarding these mock() and unmock() so that I can understand the failure better?
@dpaul24 You can read more about mocking here: http://vunit.github.io/logging/user_guide.html#mocking
@umarcor @LarsAsplund > From what I have learnt up to now, multiple test-cases can be defined inside a VUnit TB using the run() procedure. The string depicting the test-case name inside the run("...") should not contain blank spaces, e.g. run("Test_single_write") is the correct way. In such a situation if the command py run.py <library_name_set>.<testbench_name_set>.<test-case-name_set> -v can be used to run selective test-cases. However if some uses run("Test single write"), using blank spaces within the string, then run.py will ignore that particular test-case.
Can anyone of your please confirm the above?
I mean VUnit will not throw an error when run("Test single write") is used, but if blank spaces is used within the string, then that particular test-case cannot be selectively run.
py run.py '<library_name_set>.<testbench_name_set>.<test-case-name_set>' -v
That's annoying but standard terminal/shell behaviour.
Either use no blank spaces or use quotes "....".
@dpaul24 In the early days of VUnit, prior to the first public release, we had internal discussions about test case naming. Whether we should have arbitrary strings or restrict ourselves to identifier naming rules. SW unit test frameworks typically have identifier rules so there is a familarity with that. However, in the typical unit testing framework the test case is represented by a method or a function in which case naming is limited. To allow naming strategies that are very verbose, for example those promoted by BDD, we decided to go for an approach that allows for natural language naming. Some people still prefer identifier naming but VUnit doesn't impose such restrictions.
cool, I have seen this post: https://vunit.github.io/blog/2017_06_03_enable_your_simulator_to_handle_complex_top_level_generics.html
You can pass the dictionary as string or as the path to a file. Optionally, you can encode the string:
TB.get_tests("stringified*")[0].set_generic("tb_cfg", JSON_STR)
TB.get_tests("b16encoded stringified*")[0].set_generic("tb_cfg", b16encode(JSON_STR))
TB.get_tests("JSON file*")[0].set_generic("tb_cfg", JSON_FILE)
TB.get_tests("b16encoded JSON file*")[0].set_generic("tb_cfg", b16encode(str(TEST_PATH / JSON_FILE)))You only need one of those. The four of them are used in the example for illustration.
Hence, regardless of using JSON and JSON-for-VHDL, it is some to keep in mind.
Q> While running simulation using ModelSim, I am always getting the warning: " Warning: There is an 'U'|'X'|'W'|'Z'|'-' in an arithmetic operand, the result will be 'X'(es)." and I want to get rid of this warning. How can I do it?
What I did and is not working>
- In my run.py, I have added the following which fails to take effect...
vu_prj.set_sim_option("modelsim.init_files.after_load", ["turn_off_some_warnings.do"])
vu_prj.set_sim_option("modelsim.init_files.before_run", ["turn_off_some_warnings.do"]) - I have also tried using vu_prj.set_sim_option("disable_ieee_warnings", True, allow_empty=True) and this also fails to work.
Is there any other things I can try out from run.py?
Note that if I run the DO file turn_off_some_warnings.do at the ModelSim prompt before the run -all command then I get what I want to have.
works for me
@dpaul24 You're using
allow_empty=True. Is that because it didn't find any testbenches? Note that the sim option only applies to testbenches added before the sim option was set.
Well I did not give it much thought, I just think it would be safe to use the TRUE setting. btw - All my TBs are loaded I use vu_prj.set_sim_option("disable_ieee_warnings", True, allow_empty=True)
@dasHorst99 You can set the length when creating the master, see https://github.com/VUnit/vunit/blob/96a24b38ba1553f520beb81f26753ca85dafb707/vunit/vhdl/verification_components/src/axi_stream_pkg.vhd#L163
I am not a pro in VHDL so please forgive my question:
Do I have to change it in that file or can I change it also throughout other methods?
Do I have to change it in that file or can I change it also throughout other methods?
Like so?
constant master_axi_stream : axi_stream_master_t := new_axi_stream_master(
data_length => data_width
user_length => 1
);
You would do it as you suggest. It is a fix "physical" setting for that bus so you cannot change it dynamically. If you have several instances of AXI stream masters then you have several of these constants that have their own settings for
user_length and all other parameters.
@GlenNicholls you got it?
It is possible. The problem is that since VUnit can't read the encrypted file it doesn't know its dependencies and can't figure out compile order. The typical use case though is a third-party IP which doesn't change often. As such it doesn't really need to be involved in dependency checking. Use whatever compile method the vendor provides and then you add that library as an external library using https://vunit.github.io/py/vunit.html#vunit.ui.VUnit.add_external_library