I also think we should include the instructions to disable flow control for minicom
Maybe we can deliver a minicom configuration file as described here https://cris.bytesnblades.net/2009/03/24/managing-minicom-settings/
What are your thoughts on the Picorv32?
It is a very good design from a very smart guy. But is different from most other RISC-V cores: It is a multi-cycle and not a pipelined design. It reaches a high clock frequency, but has a small IPC (instructions per clock). For most uses case other cores are better then PicoRV32. I'm currently looking into VexRISCV (https://github.com/SpinalHDL/VexRiscv)
Have you checked out the iCEBreaker board? I just ordered one. It has a couple of Pmod connectors and a totally open source toolchain
I have looked into nearly all FPGA boards in the price range < 500 USD ...
The Lattice ICE40 FPGAs are small and not very fast, so I'm not so much interested in them. I'm looking forward to this one: https://www.crowdsupply.com/radiona/ulx3s