These are chat archives for esp8266/Arduino

10th
Nov 2015
Victor Aprea
@vicatcu
Nov 10 2015 01:47
@d-anders no i don't think so... it will juts be held in reset
Victor Aprea
@vicatcu
Nov 10 2015 15:10
... thinking about giving up on auto-reset
Ivan Grokhotkov
@igrr
Nov 10 2015 20:44
@vicatcu is it really that bad? i thought nodemcu circuit was pretty reliable
anyway, will check with a scope tomorrow and see what the delay between RST and GPIO0 is like.
Victor Aprea
@vicatcu
Nov 10 2015 20:45
@igrr i don't know, i'm just not sure what's up with it
@igrr I spent all day trying to get it to work yesterday and ultimately just disconnected the RTS and DTR lines altogether, and put GPIO0 under MCU control
and EN is also under MCU control
Me No Dev
@me-no-dev
Nov 10 2015 20:47
i got it to work with FTDI
and default generic settings
Victor Aprea
@vicatcu
Nov 10 2015 20:48
@me-no-dev generic settings don't toggle the RTS/DTR lines do they?
Ivan Grokhotkov
@igrr
Nov 10 2015 20:48
@me-no-dev and nodemcu reset circuit?
Me No Dev
@me-no-dev
Nov 10 2015 20:48
DTR to Reset and RTS to GPIO
Ivan Grokhotkov
@igrr
Nov 10 2015 20:49
@vicatcu generic settings do toggle reset lines, adding -cd ck option to esptool
Me No Dev
@me-no-dev
Nov 10 2015 20:49
well, I replaced the module on my nodemcu so I use generic profile and the flash button for just in case
but have noticed it sometimes succeeds flashing if I do not hit the button but it's hit and miss
Victor Aprea
@vicatcu
Nov 10 2015 20:51
hm, you guys saw my schematics right? i'm pretty confident that i'm missing a pull-up resistor which isn't helping matters
that AND gate in my circuit should have pull-ups on both inputs I think
i think i can hack a pull-up resistor in and see if that helps
Me No Dev
@me-no-dev
Nov 10 2015 20:53
I have pullups on RST, CH_PD, GPIO0, GPIO2 and pulldown on GPIO15
10K do fine
Victor Aprea
@vicatcu
Nov 10 2015 20:53
yea so my circuit is a bit more agressive - GPIO0 is always driven by the output of an AND gate
Me No Dev
@me-no-dev
Nov 10 2015 20:54
anything between 1 and 10 is fine
Victor Aprea
@vicatcu
Nov 10 2015 20:54
and EN is driven by the output of a buffer
Me No Dev
@me-no-dev
Nov 10 2015 20:54
check you timings with scope or something
or have you done that? are signals looking ok and triggering as much and when should
Victor Aprea
@vicatcu
Nov 10 2015 20:55
@me-no-dev yea I spent a lot of quality time with my scope yesterday :)
GPIO0 looked crazy sometimes
like a 2V 26MHz wave was showing up on it sometimes
Me No Dev
@me-no-dev
Nov 10 2015 20:56
wow
Victor Aprea
@vicatcu
Nov 10 2015 20:56
the modules are not broken though
Me No Dev
@me-no-dev
Nov 10 2015 20:56
maybe the circuit? not enough caps?
Victor Aprea
@vicatcu
Nov 10 2015 20:56
I took the RTS/DTR circuit out, and I can still load them with the flash download tool
and AT command software works etc etc
Me No Dev
@me-no-dev
Nov 10 2015 20:57
i have solved many problems with a large cap
so your GPIO0 is LOW before you release the reset and stays low for some time right?
Victor Aprea
@vicatcu
Nov 10 2015 20:58
that's the other weird thing with the NodeMCU circuit
i'm pretty sure I was seeing Reset come up before GPIO0 came up
maybe the gate delay of my AND gate is significant or something
Me No Dev
@me-no-dev
Nov 10 2015 20:58
that is correct
Victor Aprea
@vicatcu
Nov 10 2015 20:58
oh right that does make sense
Me No Dev
@me-no-dev
Nov 10 2015 20:58
GOIP0 needs to stay put after reset release so the chip sees it
Victor Aprea
@vicatcu
Nov 10 2015 20:59
it's gotta stay low long enough for bootstrap to take hold
Me No Dev
@me-no-dev
Nov 10 2015 20:59
that is what I think you might be having issues with
have you checked the console to see what the board sees?
Victor Aprea
@vicatcu
Nov 10 2015 21:00
i built three boards, one of them still has the node circuit installed
Me No Dev
@me-no-dev
Nov 10 2015 21:00
you can RX on GPIO2 while uploading on serial0
Victor Aprea
@vicatcu
Nov 10 2015 21:00
yea it was exhibiting a variety boot modes
hehe
i'll come back to it later
i was a bit delirious toward the end of yesterday
Victor Aprea
@vicatcu
Nov 10 2015 21:07
the crazy thing is i was convinced that the and gate should be driving low, but the AND gate seemed to not be "winning" if you know what i mean
ala that 26MHz signal
Ivan Grokhotkov
@igrr
Nov 10 2015 21:14
ESP's GPIO0 can source a lot of current
I remember having this issue when we were working on "Wifio" board
Victor Aprea
@vicatcu
Nov 10 2015 21:17
@igrr that's believable... maybe I should replace my AND gate with a NAND gate, and have it drive an NPN transistor that pulls down GPIO0
that would teach it a lesson :)
Ivan Grokhotkov
@igrr
Nov 10 2015 21:17
Isn't it driven with a transistor directly in Nodemcu circuit?
Yeah, I got a lesson to prototype on a breadboard before ordering PCBs...
our reset circuit didn't work either
Victor Aprea
@vicatcu
Nov 10 2015 21:18
that's rough i know the feeling
it's "kind of" driven by a transistor
ultimately it's just driven by the sink capability of the DTR pin
i.e. neither of those transistors is connected hard to GND on the emitter side
am I making sense? :)
Ivan Grokhotkov
@igrr
Nov 10 2015 21:20
yes. perhaps CP2102 can sink more than FTDI?
Victor Aprea
@vicatcu
Nov 10 2015 21:22
i think that can sink 25mA
which is "a lot" but maybe not "enough"
but if I hold one of it's inputs low, I can reliably load it with the flash download tool
Ivan Grokhotkov
@igrr
Nov 10 2015 21:23
what is the resulting voltage you're seeing on GPIO0?
i.e. when you're trying to drive it low
Victor Aprea
@vicatcu
Nov 10 2015 21:25
i wasn't seeing a steady DC voltage, I'm going to try again to bolt on the missing 10k pullup on one of the AND gate inputs and see if that makes a difference
i was seeing like a 1-2V 26MHz square wave
like the ESP was getting into some weird state
anyway, I'll poke at it again tomorrow
i wish it was easier to pull traces off my scope to share
but it has no network interface which is annoying
Ivan Grokhotkov
@igrr
Nov 10 2015 21:33
if the square wave tops at 1v, that's probably okay.
2v is above logic high threshold
Victor Aprea
@vicatcu
Nov 10 2015 21:37
@igrr my thinking is wtf is there a square wave :) haha
@igrr btw if/when I get this board working can I send you one?
Ivan Grokhotkov
@igrr
Nov 10 2015 21:39
square wave is ESP8266's clock. it's the default mode of GPIO0 pin (and a few others)
Victor Aprea
@vicatcu
Nov 10 2015 21:39
ha that explains a lot
most processors default to tristate inputs
or so i thought
Ivan Grokhotkov
@igrr
Nov 10 2015 21:42
yes that's an unconventional choice for a microcontroller :)
I hope they learned a thing or two, ESP32 might be better in some aspects
Angus Gratton
@projectgus
Nov 10 2015 21:46
vicatcu: the spec on the logic gate you posted is sinking 4mA @ 3.3V, so if it's fighting an output driven high it might be losing (or at least not pulling it down enough)
I thought the ROM code switched GPIO0 to an input before reading it though, during the boot process
but I could be wrong about that
igrr: yeah, there's a lot of places where you can see that when ESP8266 was originally designed (as ESP8089 or whatever?) they never thought anyone but them would be doing custom things with it :)
Ivan Grokhotkov
@igrr
Nov 10 2015 22:16
/all I remember seeing this somewhere but can't find the reference now.
What's the difference between
ets Jan 8 2013,rst cause:2, boot mode:(3,7)
and
ets Jan 8 2013,rst cause:4, boot mode:(1,7)
Angus Gratton
@projectgus
Nov 10 2015 22:28
igrr: don't know about official sources, but
so 1, vs 3, is gpio0 high vs low