In Haswell table for DIV r32- it is mentioned the latency range 22-29
and for DIV r64- it is mentioned the latency range 32-96
But in gas-cost table for both i32 and i64 type it is mentioned 80 cycle
This is the original source of the document: https://gist.github.com/axic/5bf506728005864461454dd4d37a7f37
And it refers to “Appendix C” of https://software.intel.com/sites/default/files/managed/9e/bc/64-ia-32-architectures-optimization-manual.pdf of which @cetrio copy pasted.
Anyway, I wrote it over 3 years so don’t remember where the 80 came from.
@ajoydas Hera wraps 3 different wasm engines. These engines and others were benchmarked by @cdetrio and others. I would need to dig up some slides presenting results. But running evmone benchmark suite in Hera is not directly possible, because these are EVM bytecodes, not wasm.
For EVM benchmarking results see https://github.com/ewasm/benchmarking/.
how to use C++ write a wasm contract and send to ewasm testnet
or other languages