set_state, PWMGenerator uses the firmware function sqr4. This function outputs a PWM signal on every SQ-pin, including pins which should be constant high or constant low. It is therefore necessary to reset pins which should not have PWM signals on them after calling the firmware function.
Regarding tests/test_spi.py:
For testing SPI transfer, I planned to connect MISO and MOSI (SDO -> SDI). Simple but, has some cons: can't test write and read independently, and can't test SMP bit of SPI config (main problem).
Then second plan, use logic analyser for MOSI and PWM generator for MISO. By this we can test write and read separately and can test SMP bit of SPI config. But testing SMP bit need precision PWM wave generation.
Like:
For testing, we need a PWM wave with the same frequency as SPI and 50% phase shifted from SPI. So that if we read, we get 0 (when SMP=0; Input data is sampled at the middle of data output time) and 0xFF (when SMP=1; Input data is sampled at the end of data output time).
Like:
SCK: ___|```|___|```|___|``
PWM: `|___|```|___|```|___|
SMP=0: ___|_______|_______|__ (Input Sample)
SMP=1: _______|_______|______ (Input Sample)The phase shift may be tricky. We need to check if there is a constant phase shift between the SPI bus and a PWM signal with the same frequency. If there is, it should be easy to adjust the PWM signal's phase to get the desired behavior. If the phase shift is not constant (i.e. the frequencies are not exactly the same), this method probably won't work.
Here's a decent board for those interested in FPGAs:
https://github.com/GlasgowEmbedded/glasgow
And the other one from the Radiona hackerspace:
https://radiona.org/ulx3s/
Both are open hardware and work with open tooling. The Glasgow is very much like PSLab, but based on an FPGA.
Glasgow is a tool for exploring digital interfaces, aimed at embedded developers, reverse engineers, digital archivists, electronics hobbyists, and everyone else who wants to communicate to a wide selection of digital devices with high reliability and minimum hassle. It can be attached to most devices without additional active or passive components, and includes extensive protection from unexpected conditions and operator error.
https://1bitsquared.de/products/orangecrab
Sooo... they're all based on Lattice FPGAs (Lattice being an FPGA vendor). Arrow is just a distributor, and they do have Lattice among their catalog:
https://www.arrow.com/en/products/lcmxo3lf-9400e-5mg256c/lattice-semiconductor
@mariobehling could you ask the person who contacted you if they would offer their workshop based on the open tooling that the community made for Lattice FPGAs?
The Glasgow is very much like PSLab, but based on an FPGA.
Where would you see a difference to what a future PSLab FPGA could offer compared to the Glasgow board?
Esden and others are working on an FPGA demoscene platforn; see https://twitter.com/esden/status/1419894580166598657?s=19 or join on Twitch, where they stream live :)
From the current chat at gamozo's stream:
It will be a lot of fun. The RISC-V based retro inspired console that drr developed is a great IP to run on this platform. As well as the Doom implementation and a few more things.
100% Open Source FPGA Tools: RTL-to-Bitstream in Minutes - A Hands-On Tutorial
I have seen the PSLab v{5,6} schematics doc for refactoring UART in pslab-python and I need some clarification for proceeding further.
- PSLab v5 uses only one UART port, which is shared for USB, WIFI, BT and External. Right?
- Since all of these shares the same port, only one can be used at a time.
- UART pass through has no use in v5.
- Since WIFI, BT uses the same port as USB, we can send commands and get result directly via wifi or BT. Right?
- PSLab v6 uses two UART port, one dedicated for USB and another for WIFI, BT, External.
- What is the use of UART pass-through? Is it only used to send commands and get results via wifi or BT, since both are in separate UART port?
Thankyou.
@CloudyPadmal
2 replies
TempSense: A Four-Channel Temperature Logger Based on a USB Bridge and CircuitPython https://openhardware.metajnl.com/articles/10.5334/joh.34/
today:
100% Open Source FPGA Tools: RTL-to-Bitstream in Minutes - A Hands-On Tutorial
o Claire Wolf, Inventor of Yosys and Founder/CTO of YosysHQ
o Vaughn Betz, Professor & NSERC/Intel Industrial Research Chair at University of Toronto
o Xifan Tang, Research Assistant Professor at University of Utah & Lead Developer of OpenFPGA Project
register here: https://us02web.zoom.us/webinar/register/WN_WUps_z07T3GV2LDqsnSSJA?timezone_id=Europe%2FBerlin
QUARK: Open Source Handheld Electrical Measurement Probe based on ESP32 and Arduino
https://circuitstate.com/featured/quark-open-source-handheld-electrical-measurement-probe-based-on-esp32-and-arduino/#comments