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Mario Behling
@mariobehling

https://twitter.com/mariobehling/status/1531119488556355584

PocketScienceLab dev @bessman

released #mcbootflash a #Python #FOSS #OpenSource tool for flashing #firmware to devices running
@MicrochipTech's MCC 16-bit bootloader. Can be automated and used as a library. https://github.com/bessman/mcbootflash

Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
I shared mcbootflash in the OSF community. :)
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]

From a reply:

there's a neglected PIC24 project on my bench, will check it out!
Also randomly amazing, in this PIC bootloader I came across:

https://github.com/BroadwellConsultingInc/BootloaderPIC16F15214/blob/main/BootloaderPIC16F15214.X/main.c#L404

they check if VDD provided is under 2.2v
if so stay in the bootloader!
I've never even considered such an implementation 🤯
is a neat trick if you don't want to burn a gpio pin...

1 reply
Alexander Bessman
@bessman
I added instructions for how to use the TCD1304 code with PSLab v5 to the PR: fossasia/pslab-python#211
Mario Behling
@mariobehling
:thumbsup:
Alexander Bessman
@bessman
:smiley:
$ pslab flash -p /dev/ttyUSB0 pslab-firmware.hex 
Flashing pslab-firmware.hex.
Got bootloader attributes:
Max packet length: 256
Erase size:        2048
Write size:        8
Got program memory range: 0x001800:0x02a7fe.
Erased flash area 0x001800:0x02a7fe.
Flashing HEX segment 1: 0x001800:0x00c954.
100%  88.7 KiB |########################################| Elapsed Time: 0:00:20
Self verify OK.
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
Nice! 🥳
RafaelLeeImg
@RafaelLeeImg

Hi, For the future selection of the main controller, there are some observations of me:

1, The risc-v has it's strength and weakness, it's like the difference between iOS and Android, the Android is more open, but there are too many diversion in different manufacturers. That leads to Android ecosystem fragmentation. The iOS is more different, it's more centralized, but the evolving directions are more controlled. It's like the relationship between ARM and RISC-V, risc-v is more open, ARM is more controlled. That leads to different strategy of companies in these parties. Start-up companies are more willing to develop RISC-V while they are more willing to design and manufacturer modified RISC-V cores.

2, The previous point leads to the develop toolchain diversions, there could be toolchains used only for some types of RISC-V cores, since company may have their own version of instruction set, so cannot use upstream GCC/clang.

3, ARM is more mature than risc-v, the document is more and more complete.

4, other than some demo projects like LED blinking, I haven't use RISC-V. I'm have read tons of materials with ARM. There are hell a lot of knowledge behind different types of cores. By the way PIC is another dead-end, it's not even evolving, the hardware abstraction layer provided by the company are kind of naive with very preliminary abstractions, and there is no many open source library can be used, I would assume the company is trapped in their own history and old-days glorious and cannot advance.

Since FOSSASIA is not opening a chip company, and the type of core is not the point of advertisement, I'd like to suggest to keep-up with ARM. There is no doubts that the core is stable and already proven by the industry. Back to RISC-V, it's not been proven.

Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]

Agreed on 1 and 2, and I can say that I already know some occasions where 2 is happening. 👍 I would add that some vendors may also see RISC-V as an experiment for them. A chip design company employee told me at Embedded World that they are not trying RISC-V for costs reasons, and that ARM fees do not matter when they scale up processor manufacturing. I personally think it's a bit biased and that the benefit is rather to new companies which cannot invest much initially.
3 is also true, some RISC-V docs are very terse (though I am speaking from experience with the privileged spec and application processors mostly). In some aspects, they just go with "what ARM does", oddly enough.
On 4: I have a collection of RISC-V boards here (both MCUs and application SoCs) and especially the Allwinner D1 is fun to work with, but mainly because people already put a lot of effort into it. I translated the DRAM init code for it and we have fully open Rust firmware for it that brings up Linux already. I can demo it, if you like. :-) And I know that Bouffalo Labs is doing a lot of nice stuff as well. One of their MCUs is used on a Sipeed board as a decent debug probe. Regarding PIC, it seems to me that it's legacy stuff indeed, though still produced for a while due to some larger customers still using it for their applications, but it's hard to tell what those are etc..

So I agree, in conclusion, that ARM is the current best bet when it comes to the ISA and, even more important IMHO, the tooling. 👍

Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
Let me add those remarks:
ARM vendors may also extend the instruction set, e.g., by adding special DSP instructions. And the peripherals can be arbitrary, too. So here is what we needs docs for at least:
  • ISA (ARM: Thumb + specific extensions/version, e.g., Arm v7)
  • core(s) (e.g., Cortex-M0); that may involve a microarchitecture
  • custom extensions (from the SoC/MCU vendor)
  • peripherals (can be open; vendors often buy those, so watch out)
https://en.m.wikipedia.org/wiki/ARM_Cortex-M
has quite a list of ARM MCU instruction set variants, cores, and chips made with them
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
That page also lists documentation needed to work with a specific chip in the Documentation section, a bit more elaborate than what I wrote above. :-)
Alexander Bessman
@vgfsrhkbgd:matrix.org
[m]
I won't be able to join today's meeting. See you next week!
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
Someone made a logic analyzer + oscilloscope with a Pi Pico:
https://github.com/fhdm-dev/scoppy/
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
And there's also one project with Sigrok support: https://hackaday.com/2022/03/02/need-a-logic-analyzer-use-your-pico/
Mario Behling
@mariobehling
RafaelLeeImg
@RafaelLeeImg
20220709-135525-pslab-qt.png
I built a GUI with qt5, c++ for debugging PSLab. I used python to forward sampling data through socket, so the GUI part only takes care of data showing.
I also built a signal generator with STM32F4-Discovery to generate waveform to test oscilloscope.
Due to the test result, the PSLab only can forward around 40,000 samples to PC in a second.
RafaelLeeImg
@RafaelLeeImg
Some thoughts about the GUI program, the GUI is better to write with one language, thus, user only need to take care of the debugging of one particular language, the deploy will be more controlled. I think use C++ or Python are both OK. I'm using C++ for the testing GUI is that I found a oscilloscope example in QT5, it's qmloscilloscope. And with C++, I'm more confident about the performance, it won't be the bottleneck. So I can spend more time on the firmware part.
RafaelLeeImg
@RafaelLeeImg
The problem of QT is that, the GUI is written in another language called QML, not exactly C++, and some errors are raised on run-time, that approach lost the ability of compile-time type checking, and makes the program hard to debug. But I believe that QT program can be translate into pure C++ at least by hand. The QML compiler compiles the QML language to raw byte array to C++, that makes it hard to debug.
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
Before the Electron rewrite, the PSLab desktop app was, in fact, written in Python with Qt. ^^ Back then it was Qt4 and I did a little overhaul to get to Qt5.
RafaelLeeImg
@RafaelLeeImg
I didn't find the QT version of PSLab desktop. I asked.
There was another thought, if the PSLab desktop is decided to be based on browser, then why not just make it a server program, leave the GUI part to run in Chrome or Firefox?
4 replies
RafaelLeeImg
@RafaelLeeImg

The mcubootflash and the bootloader does not work.
I tried both 2.0.0 and origin/progressbar, none of them works.

$ ~/.local/bin/mcbootflash --port=/dev/ttyUSB0 --baudrate=115200 pslab-firmware/pslab-core.X/dist/default/production/pslab-core.X.production.hex
Flashing pslab-firmware/pslab-core.X/dist/default/production/pslab-core.X.production.hex.
Traceback (most recent call last):
File "/home/r/.local/bin/mcbootflash", line 9, in <module>
sys.exit(flash())
File "~/.local/lib/python3.9/site-packages/mcbootflash/src/mcbootflash/flashing.py", line 105, in flash
boot.flash(hexfile=parsed_args.file)
File "~/.local/lib/python3.9/site-packages/mcbootflash/src/mcbootflash/connection.py", line 103, in flash
self.read_version(), self._get_memory_address_range()
File "~/.local/lib/python3.9/site-packages/mcbootflash/src/mcbootflash/connection.py", line 224, in read_version
read_version_response = VersionResponsePacket.from_serial(self)
File "~/.local/lib/python3.9/site-packages/mcbootflash/src/mcbootflash/protocol.py", line 93, in from_serial
return cls.from_bytes(interface.read(cls.get_size()))
File "~/.local/lib/python3.9/site-packages/mcbootflash/src/mcbootflash/protocol.py", line 88, in from_bytes
return cls(*struct.unpack(cls.format, data))
struct.error: unpack requires a buffer of 37 bytes

3 replies
RafaelLeeImg
@RafaelLeeImg

cat /etc/udev/rules.d/z010_mchp_tools.rules |grep run\+
wrong line:
ACTION=="remove", RUN+="%E{hotplugscript} remove %E{PRODUCT}"
The %E{PRODUCT} is not defined, that makes the udev.rules not effective.

The error makes the attributes 600, but the IDE need 666
crw------- 1 root root 189, 28 2022-07-10 13:05:48 /dev/bus/usb/001/029

right:
ACTION=="remove", RUN+="%E{hotplugscript} remove"

crw-rw-rw- 1 root plugdev 189, 29 2022-07-10 13:06:42 /dev/bus/usb/001/030

RafaelLeeImg
@RafaelLeeImg
20220710-191051-pslab-error-cross-zero.png
The inconsistency around 0 may due to the scaling rounding error of numpy.
RafaelLeeImg
@RafaelLeeImg
20220711-030149-pslab-raw-data-of-sampling.png
I plotted the raw sampling of ADC. The error may due to the architecture of SAR ADC inside PIC24.
RafaelLeeImg
@RafaelLeeImg
20220711-031102-pslab-SAR_DAC_3_4_error.png
20220711-031102-pslab-SAR_DAC_3_4_error.png
At the 3/4 of full DAC range, this error also occurs, that means it's the limit of SAR DAC, there is nothing we can do to improve.
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
The former Python+Qt app is further down in history @RafaelLeeImg:
fossasia/pslab-desktop@692b4af
Mario Behling
@mariobehling
@RafaelLeeImg The older version of PSLab Python using Qt is in the repository history e.g. here https://github.com/fossasia/pslab-python/tree/1c554a9f7a0135b9a8bcc4eb6ccb82719049d12a
Mario Behling
@mariobehling
Alexander Bessman
@bessman
Mcbootflash 3.0.0 released! Should be the final feature release for now, some documentation still TODO.
2 replies
RafaelLeeImg
@RafaelLeeImg

Regarding our discussion about RISC-V https://www.computerenhance.com/p/the-problem-with-risc-v-v-mask-bits

Do you understand the situation described in the article? Do you think that is something related to our choice between ARM and RISC-V?

Mario Behling
@mariobehling
Of course it is related as this background shows that there still seem to be challenges around the RISC-V spec.
RafaelLeeImg
@RafaelLeeImg
Not really. In most daily use cases, who cares about the instruction set of AVX512 on AMD64 architectures, only in some neuron network, video encoding decoding applications these will be used. The issue that the article described is not even related to our applications.
1 reply
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
And the article is widely disputed as mostly FUD.
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
riscv/riscv-v-spec#811
the discussion on the matter (a bit wild...)
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
So we can just prerender a static page, and no active server component is necessary? :)
RafaelLeeImg
@RafaelLeeImg
I'm not quite sure. In modern website design, the server cares only the content of the webpage, the layout is all done locally by the browser.
1 reply
RafaelLeeImg
@RafaelLeeImg
Today I tested the DAC MCP4822, they works.
I tried to modify the pslab-python library for the new driver, somehow, there is no good way to do that. The reasons are the following:
1, There are commands defined in the firmware, some of them are like OSCILLOSCOPE_SetPGAGain, POWER_SOURCE_SetPower, these are in the same abstraction layer, but the weird part is that the power source are actually driven by a command I2C_CommandSend, that's called abstraction leaking, that makes it hard to correct, the firmware and the pslab-python both need correction.
2, the class abstraction is totally wrong for pslab-python. For example, the layers are like pslab{oscilloscope{EMPTY},power_source{pv1{I2C:MCP4728},pv2{I2C:MCP4728},pv3{I2C:MCP4728},pcs{I2C:MCP4728}}}, the class abstraction is totally different for different instruments. Thus makes it nearly impossible to correct the errors in a elegant way. We are using MCP4822(SPI) to replace MCP4728{I2C}, that will cause the previous code invalid. The good way is to make abstraction like this pslab{oscilloscope{channel1, channel2, channel3, channel4},power_source{channel1, channel2, channel3, channel4}}, leave the decoding code in the firmware. But due to the limited performance of float point calculation, that is also not good for the current hardware.
3 replies
Next, I'll remove 1 MCP4822.
RafaelLeeImg
@RafaelLeeImg
How to test the RTC and SD card?
I didn't modify any schematic related to those components, if it's already functional, I'll skip those components.
Daniel aka CyReVolt 🐢
@CyReVolt:matrix.org
[m]
IIRC the RTC is connected via I2C, try scanning for it for a start? I also encountered some randomness and funkiness on the bus, sometimes finding the RTC or not. Not sure if that was specific to the first revision of the v6 board.
RafaelLeeImg
@RafaelLeeImg

20220711-031102-pslab-SAR_DAC_3_4_error.png

--PSLab ADC zero-crossing error around 2048 data points. What command did Rafael send to get this data?
--x, y1 = scope.capture(channels='CH1', samples=512, timegap=1)
Then plot with matplotlib or my QT front end I wrote for DAC my self. In normal conditions, the full scale are like 4096 bits, so the noise cross 2048 is no more than 0.5% of the screen height. It's will be easily ignored. The 2048 is 0b100000000000 and 2047 is 0b11111111111 so nearly all the bits are different, that means the comparison result of DAC inside SAR ADC is quite different. And the noise is actually within the noise in the specification wrote in the PIC24 datasheet. So, we can do nothing about it.