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    Oleg Nenashev
    @oleg-nenashev
    Hi all!
    SIG chat is Up and running
    Martin d'Anjou
    @martinda
    Cool
    Stefan Wallentowitz
    @wallento
    Hi, cool!
    Oleg Nenashev
    @oleg-nenashev
    Added Alex just in case he is interested
    Alex Earl
    @slide
    cool, thanks!
    Gianpaolo Macario
    @gmacario
    Hi there! Looking forward to supporting this SIG. I have been using Jenkins on Docker to build Yocto-based distros for In-Vehicle Infotainment and now Automation Systems.
    Oleg Nenashev
    @oleg-nenashev
    Cool. Maybe we should add "Embedded" to the name :)
    Gianpaolo Macario
    @gmacario
    It would definitely make sense
    Oleg Nenashev
    @oleg-nenashev
    @/all I am about submitting formal proposals about SIGs for EDA and Embedded. So, the question to this room: do we want to have a single SIG or two different SIGs? The latter seems to be logical, the areas do not 100% overlap
    Tracy Miranda
    @tracymiranda
    hi all
    Oleg Nenashev
    @oleg-nenashev
    I commit to find content for several meetings, both EDA and Embedded. But it's rather a logistics thing
    Hi @tracymiranda !
    Tracy Miranda
    @tracymiranda
    Embedded is good to have in name - it seems to be the best term for covering a wide scope of things
    Oleg Nenashev
    @oleg-nenashev
    yeah
    Tracy Miranda
    @tracymiranda
    😂😂
    Oleg Nenashev
    @oleg-nenashev
    Sad but true
    Probably we should actually start this SIG
    One of my action items I was never able to complete
    Oleg Nenashev
    @oleg-nenashev
    @/all FYI I am going to go forward and to start the SIG discussion this week so that we set up meetings and channels. We have 2 GSoC project ideas + there are is a discussion in LibreCores as well
    Added @Nancy-Chauhan to the chat. She is currently working on https://github.com/librecores/librecores-ci which is one of the Jenkins-related GSoC project ideas in other orgs
    Oleg Nenashev
    @oleg-nenashev
    @/all Started a discussion about HW-and-EDA and Embedded SIGs: https://groups.google.com/forum/#!topic/jenkinsci-dev/a69DXm6qQms
    Oleg Nenashev
    @oleg-nenashev
    Oleg Nenashev
    @oleg-nenashev
    Oleg Nenashev
    @oleg-nenashev
    Udara De Silva
    @udara28

    I'm working on an article about RTL coverage using covered and iverilog (https://chiphackers.com/lessons/verilog-code-coverage-with-covered/).

    It's still on progress, would appreciate any suggestions for improvments. Hope it will be helpful to GSOC students applying for jenkins-eda-coverage project

    Oleg Nenashev
    @oleg-nenashev
    @udara28 :+1: It would be helpful if we link the guide from the proposal (e.g. Quickstart section)
    Martin d'Anjou
    @martinda
    @udara28 nice! Thank you! Yes, please do link it!
    Udara De Silva
    @udara28
    @martinda Do I have the write permission to the document?
    Martin d'Anjou
    @martinda
    @udara28 Just gave you write permission to it. We use the "suggesting" mode most of the time so other can see the changes.
    image.png
    Udara De Silva
    @udara28
    @martinda okay got it. I made a suggestion in the proposal
    Martin d'Anjou
    @martinda
    @udara28 Thanks!