Hi @ahadnagy! Nice to find you here! We talked at ORConf and I asked you about the (javascript) tools you used to build the knobs and sliders in the web frontend of your remote framework. I saw that you contributed mostly to https://github.com/alessandrocomodi/fpga-webserver this past summer. I assume, as part of the 'Hardware Accelerated Web Applications' GSoC mentored by @@stevehoover.
As commented, I found your talk really interesting because I've been working on a GUI (web) frontend to provide custom real-time visualizations for HDL simulation of complex design/algorithms. Should I have been aware of ORConf earlier, I should have submitted a lightning talk to foster the discussion... Anyway, you can find three screencasts in https://github.com/VUnit/vunit/pull/476#issuecomment-496632427. The TL;DR is that any memory buffer (array of values, BRAM, FIFO, etc.) inside the HDL design (no matter how deep in the hierarchy) can be mapped to any Web visualization model. In the examples, a large table, two small tables and rendered images are shown, respectively. Those examples are based on VUnit + GHDL + Flask + Vue.js; nonetheless, I have successfully reproduced the setup using Octave (C++), instead of Python. The same binaries can also be used with DBM tools (e.g. MAMBO or DynamiRIO) (see dbhi).
The targets of fpga-webserver and my approach are slightly different, but I believe there are lots of overlapped implementation details. The first PR of the contributions to VUnit that provide built-in Python/C and VHDL co-execution is about to be upstreamed (VUnit/vunit#507). Therefore, I'd like to discuss possible areas of collaboration, before planing the next PRs. For example, IIRC, in http://fractalvalley.net/ the C++ models are built with Verilator, isn't it?
I don't know if this is the best room to talk about CLaaS, or if some other channel might better fit the discussion. I can also open an issue in alessandrocomodi/fpga-webserver, should you prefer.
