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  • Oct 26 01:29
    jgoeders commented #271
  • Oct 26 01:29
    jgoeders commented #271
  • Oct 26 01:23
    jgoeders commented #271
  • Oct 25 19:19
    mithro opened #278
  • Oct 25 15:21
    kgugala commented #271
  • Oct 24 19:58

    olofk on yosystcl

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  • Oct 24 19:54

    olofk on esr1

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  • Oct 19 21:44

    olofk on master

    Code style improvements * Remo… Fix test_edam_hook The test wa… Test the execution of more than… (compare)

  • Oct 19 21:44
    olofk closed #276
  • Oct 19 21:44
    olofk commented #276
  • Oct 19 21:39
    olofk commented #277
  • Oct 19 21:38

    olofk on master

    Add missing verbose argument to… (compare)

  • Oct 19 21:38
    olofk closed #277
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    olofk commented #271
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    rswarbrick opened #277
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    mithro commented #271
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  • Oct 12 11:28
    olofk commented #271
  • Oct 12 10:50
    olofk commented #271
Olof Kindgren
@olofk
This is what I ended up with
module blinky
  #(parameter clk_freq_hz = 0)
   (input  clk,
    output reg q = 1'b0);

   reg [4:0] count = 0;

   always @(posedge clk) begin
      q <= count[4];

      count <= count + 1;
   end

endmodule
Karol Gugala
@kgugala
and the latest edalize?
Olof Kindgren
@olofk
Yes
oh... should try an older edalize in case I messed up something
Nope, same
Olof Kindgren
@olofk
@kgugala Ok, so apparently I'm not very good at giving up. Did some more tests today and got it working! The issue was a missing -pvector bra in the edif options. I remember seeing that somewhere but it must have gotten lost at some point. Weird that I didn't catch it in the tests. Is this exclusively for use with Vivado, or should it be set for other tools too?
Ahh.. it's passed to the template, but the template never picks it up.
Probably broken since the custom yosys template feature then :/
It would be much easier to maintain Edalize if people didn't write all these EDA tools :)
Karol Gugala
@kgugala
could be, great you found it
I wasn't able to check this - I got my second covid shot yesterday and since then my new 5G nanochips are updating giving me some fever ;)
Olof Kindgren
@olofk
Oh no! You are one of them now. Didn't you know that the pandemic is just a hoax so that the government can have an opportunity to change batteries in all the birds? ;)
Karol Gugala
@kgugala
cannot talk now, switching my Linux installation to Windows ;)
Olof Kindgren
@olofk
удачи!
Olof Kindgren
@olofk
Hey @zarubaf, you here? Got a Morty question
Carlos Alberto Ruiz Naranjo
@qarlosalberto
hey guys! Is it necessary the MODEL_TECH environment variable to simulate with ModelSim? I have ModelSim in the system path
is there any documentation about the variables needed for each simulator?
Olof Kindgren
@olofk
@qarlosalberto Yes. $MODEL_TECH is required. It's a questionable design decision though :) IIRC, the only time it's really needed is for building VPI stuff because you need to include directories relative to $MODEL_TECH. We could probably figure out the correct include dir if we know where the vsim binary is, so having it in path should be enough really
No list of required env vars either. The only one I can see from a quick look is INTERCHANGE_SCHEMA_PATH, when symbiflow is used with the interchange_fpga arch
Carlos Alberto Ruiz Naranjo
@qarlosalberto
okok!
synth, hw_target...
but I haven't seen that options in the documentation
Carlos Alberto Ruiz Naranjo
@qarlosalberto
could I use that options?
m-kru
@m-kru
I see there is esr1 branch and there is some back refactoring there. Are the changes going to be backward compatible from user point of view?
Olof Kindgren
@olofk
@m-kru I think what's in the esr1 branch is already in master. These changes are intended to be backwards-compatible
Generally, there's a larger ongoing refactoring of the Edalize backends to make things a bit more flexible. A very rough draft can be found here https://github.com/olofk/edalize/wiki/Edalize-(Slight-return)
As a first step, all toolchains that consist of multiple tools will pass EDAM structures between them to make it easier to plug together new combinations
Olof Kindgren
@olofk
@qarlosalberto Weird. It should be there. I need to check how the docs are generated. Completely forgot how that works.
Olof Kindgren
@olofk
Ok, I have absolutely no idea how the Edalize documentation works
It probably made sense at some point in time
aha. It looks like it's manually generated, or was generated at some point but not kept up to date
This sucks
Olof Kindgren
@olofk
OTOH, in the FuseSoC documentation we extract the available tool options automatically into the docs
Olof Kindgren
@olofk
ok, so the answer is to add something to edalize that parses the tool options when we build the docs. Thought we already had that
Olof Kindgren
@olofk
@qarlosalberto Until we have fixed automatic generation in the Edalize docs I think the best way is to look at the FuseSoC docs. https://fusesoc.readthedocs.io/en/stable/ref/capi2.html#tools
Carlos Alberto Ruiz Naranjo
@qarlosalberto
@olofk thanks!
Rik
@riktw

Hey everyone. I am running into an issue with Silice, and I think it might be Edalize related. On building the blinky project for Silice, which uses Edalize as build tool, I get the following error:

  File "/usr/local/lib/python3.8/dist-packages/edalize/trellis.py", line 41, in configure_main
    yosys_synth_options = "-nomux" + yosys_synth_options
TypeError: can only concatenate str (not "list") to str

The json file for it can be found here: https://github.com/sylefeb/Silice/blob/master/frameworks/boards/ecpix5/board.json

I am using Ubuntu 20.04 (python 3.8.10).
Is this indeed Edalize related, or perhaps a Silice related issue?

Jonathan Balkind
@Jbalkind
if you change "yosys_synth_options": ["-abc9"], to "yosys_synth_options": "-abc9", does it fix it?
seems like a case that edalize should probably handle but that should be a workaround I think
Rik
@riktw
I resolved the issue by installing the latest 0.2.5 version. It seemed that I had 0.2.0, so it seems the issue is already fixed, whoops
Jonathan Balkind
@Jbalkind
well that works too haha
Carlos Alberto Ruiz Naranjo
@qarlosalberto
Doy you know which are the arguments to generate a VCD file with edalize and Modelsim?
Olof Kindgren
@olofk
@qarlosalberto Good question. I usually just use $dumpvars in the testbench but there might be some way to make modelsim output a vcd instead of its native wlf files
Took a quick look and there's apparently a wlf2vcd command in modelsim. It's also possible to do it with tcl commands so perhaps you want to inject a TCL file to be executed before the simulation
Carlos Alberto Ruiz Naranjo
@qarlosalberto
thanks @olofk I will take a look