This week is impossible for me, but we could do something on Oct 2 or 4
@/all My draft slides for ORCONF this year: https://speakerdeck.com/onenashev/whats-new-in-librecores-ci-orconf-2019 . There are still few hrs before the presentation, please let me know if you want something to be changed
@Nancy-Chauhan I reconfigured https://github.com/orgs/librecores/teams/librecores-ci-contributors so now you should have Triage permissions in all LCCI repositories
Also created https://github.com/librecores/ci.librecores.org so that we can start splitting SaaS and the Jenkins master repo
I think I will start the new repo in K8s right away
Will likely create a repo for the Helm chart later
So we are thinking to move towards kubernetes
@Nancy-Chauhan I reconfigured https://github.com/orgs/librecores/teams/librecores-ci-contributors so now you should have Triage permissions in all LCCI repositories
Thanks Oleg !
I suppose it ran 4 days back https://ci.librecores.org/job/Projects/job/OpenRISC/job/mor1kx/job/master/plot/Resource%20Usage/
in that case , can i now send PR to or1k-marrochino to have yosys ( if now our jenkins work properly )
Hey guys, i looked at work you are doing. I have good knowledge of concepts related to advanced computer architecture like tomasulo's algorithm, exploiting parallelism etc. I have experience of coding in verilog for FPGA and using different synthesis tools like Xilinx, yosys(open source), i want to dive deep into new things like jenkins, docker, Kubernetes etc. Please let me know as how to start contributing into this and learn at the same time.
@akhilsingh05_twitter Hi, thanks for the interest! Currently I am creating newbie-friendly issues in LibreCores CI for Hacktoberfest: https://github.com/search?q=org%3Alibrecores+is%3Aissue+is%3Aopen+label%3Ahacktoberfest . it could be a good starting point
Hey @stffrdhrn @oleg-nenashev @akhilsingh05_twitter , I have been working on issue librecores/librecores-pipeline-lib#16 , here I am having some syntax errors ( verilog) : https://ci.librecores.org/job/Projects/job/OpenRISC/job/or1k_marocchino/view/change-requests/job/PR-16/2/console
@akhilsingh05_twitter , It would be great if you can help me with this : we had the similar issue in other project : openrisc/mor1kx#90
@Nancy-Chauhan Error was coming because yosys does not support (synopsys|synthesis) parallel_case. So, as mentioned here: https://github.com/YosysHQ/yosys/blob/master/frontends/verilog/verilog_lexer.l . Now when that type of comments are used if you see line 369 in above link it will return TOK_SYNOPSYS_PARALLEL_CASE which is unexpected thus giving error. This error can be solved if instead of comment we write it in form of attribute. I did that and error got resolved.
But i guess we have to remove it from many files if I want to include
fpu too
@Nancy-Chauhan @oleg-nenashev Adding comment after case is not the right way as done here: https://github.com/openrisc/mor1kx/pull/90/commits/cf13f5e811f62a8c267f879e9ec294acff0ecf5a . Though it will remove error and can also sometime fail as well, it is needed to convert those comments to attribute.
Can you make a PR with the changes ? Will be quite good . Thanks for helping out
Can you tell which repository because if i identified correctly there are atleast two which have this error.
I meant
pfpu_marocchino and also https://github.com/openrisc/or1k_marocchino/tree/master/rtl/verilog all files here
Thanks a lot @akhilsingh05_twitter
So I want to include : https://github.com/openrisc/or1k_marocchino/blob/master/or1k_marocchino.core#L39 and https://github.com/openrisc/or1k_marocchino/blob/master/or1k_marocchino.core#L7 all verilog files for yosys synthesis , and so I want these files dont have syntax errors !
So I want to include : https://github.com/openrisc/or1k_marocchino/blob/master/or1k_marocchino.core#L39 and https://github.com/openrisc/or1k_marocchino/blob/master/or1k_marocchino.core#L7 all verilog files for yosys synthesis , and so I want these files dont have syntax errors !
So Please send PR in the repository
or1k_marocchino , correcting it
@Nancy-Chauhan I am getting this: remote: Permission to openrisc/or1k_marocchino.git denied.
fatal: unable to access 'https://github.com/openrisc/or1k_marocchino.git/': The requested URL returned error: 403
fatal: unable to access 'https://github.com/openrisc/or1k_marocchino.git/': The requested URL returned error: 403