Has anyone had the tests working with GHDL on ubuntu recently?
@hgomersall Can you specify "recently"? :-) I did run the tests during my PR regarding intbv initialization. It was last summer. The PR did also contain a few fixes for ghdl test issues when I remember right.
dsp48e1/simple_wrapper.pyis really just an example of how to use a lower level module and is not necessary. The actual interesting usage is in
VivadoDSPMacro), which is instantiated here: https://github.com/develone/Ovenbird/blob/b626798e79477d18f99554c3ecedde0302eaa347/examples/dsp48e1/dsp48e1.py#L164
DSP48E1is the MyHDL version of the IP block
get_verilog_instance()on the factory.
setcall then prunes out replications).
VerilogIPobjects you just looked up.