I'm assuming that the DVI connector is meant as an input for the monitor part, or does it also connect to the FPGA somehow?
In theory you can flash it with my https://github.com/skiphansen/pano_progfpga project ONCE since no one has written a bootloader yet.
`skip@Dell-7040:~/pano/working/pano_progfpga$ ./series1/progfpga -d
Running Test = discover
IP ADDRESS SUBNET MASK GATEWAY ADDRESS MAC ADDRESS REVISION
192.168.123.158 255.255.255.0 192.168.123.1 00-19-99-bb-5d-9e 2049.20
at least for now.
This isn't a (bad deal)[ https://www.ebay.com/itm/115353694924?mkevt=1&mkpid=0&emsid=e11021.m43.l1120&mkcid=7&ch=osgood&euid=e9b13e2975df4d5b945066d1115ef434&bu=43184805008&ut=RU&osub=-1%7E1&crd=20220422032325&segname=11021&sojTags=ch%3Dch%2Cbu%3Dbu%2Cut%3Dut%2Cosub%3Dosub%2Ccrd%3Dcrd%2Csegname%3Dsegname%2Cchnl%3Dmkcid] 8 x G2 RevC for $8.13 each.
until I realize that I still have 2 boxes full these things…
https://www.ebay.com/itm/115364518286?hash=item1adc42d98e:g:JPgAAOSwLMFiYUaJ looks like it was relisted. Either that or the seller has a lot more than 8 units
I'd still rather have a Rev B for Litex or I'd bite
Looks like this is your action then if you want 6 for $14.84 each https://www.ebay.com/itm/284793244946?mkevt=1&mkpid=0&emsid=e11021.m43.l1120&mkcid=7&ch=osgood&euid=b1cf87b236e94fe69d57e56a527588e2&bu=43184805008&ut=RU&osub=-1%7E1&crd=20220501034546&segname=11021&sojTags=ch%3Dch%2Cbu%3Dbu%2Cut%3Dut%2Cosub%3Dosub%2Ccrd%3Dcrd%2Csegname%3Dsegname%2Cchnl%3Dmkcid
I've been playing around with Ghirdra again and I think have figured out when and how the MAC address is stored in flash. See the new Wiki page if you are interested: https://github.com/tomverbeure/panologic-g2/wiki/Pano-Data-Block
More results from Ghirdra .. there are a ton of test functions embedded in progfpga. I just figured out how to run them. https://github.com/skiphansen/pano_progfpga/blob/master/TestCommands.md
New project announcement: Network based loader and flasher for Pano G2 devices https://github.com/skiphansen/panog2_ldr
@tomverbeure: yes it works on the DZ22-2 ... what are you doing this weekend? I'd love to see a huge bouncing sphere! Let's see if you can use all of the resources on an lx150.
I've had some success with the DZ22-2. I built and tested Tom's code from https://github.com/tomverbeure/panologic-g2 and verified a nice 1080p test pattern on a regular G2 on both the DVI and mini HDMI connectors. Then flashed the image to my DZ22-2 and ran it. An external monitor attached to the DVI port works, but there's nothing on the built in LCD. I know the LCD works because there's a message about check your connection before it times out. And ... drum roll ... after power cycling it pano_ldr runs again so I'm good to try again (and again ... )
Ignore the text, this is @1080p. Neither 640x480 nor 1680x1050 work at the moment for unknown reasons.
Italy and try this out! :-)
BTW my latest version of your test code with mods for the DZ22 is here: https://github.com/skiphansen/panologic-g2.git in the DZ-22_test branch. There are 4 signals unique to the DZ-22 for status. One needs to be wiggled to get the display to wake up.
I needed up bricking mine so I spent most of yesterday recovering. I got too excited when I got the first image and accidentally flash my next iteration at 0x90000 instead of 0x900000 ! That took out both pano_ldr AND the golden image. Opps!
Opening the case was a HUGH pain. Putting it back together was an equally HUGE pain. I broke the menu switch off in the process but other than that it's back together and shockingly working. I now have a JTAG connector hot glued to the back for next time.
It's basically just two, a main and backup. Of course Xilinx has to name them something odd main=multiboot and backup=golden. UG380 (Spartan-6 FPGA Configuration User Guide) has the gory details. The ICAP_SPARTAN6 user primitive allows you to reboot/reload/reconfigure from where ever in SPI. The RTL to do that is here: https://github.com/skiphansen/pano_blocks/tree/master/cores/g2/multiboot.
The landmine is a clocking limitation that's pretty well hidden... the ICAP_SPARTAN6 block is limited to 20Mhz.
Hey Skip,
question about the multiboot process: using the xilinx terminology, fresh out of the box, a Pano G2 has a multiboot bitstream (the default boot bitstream) and the golden bitstream (the fallback bitstream that is used when the multiboot bitstream is corrup.)
When you use progfpga to change the multiboot bitstream with your own, and that programming step fails, then the G2 will simply fallback to the golden and you can retry the programming step.
question about the multiboot process: using the xilinx terminology, fresh out of the box, a Pano G2 has a multiboot bitstream (the default boot bitstream) and the golden bitstream (the fallback bitstream that is used when the multiboot bitstream is corrup.)
When you use progfpga to change the multiboot bitstream with your own, and that programming step fails, then the G2 will simply fallback to the golden and you can retry the programming step.
However, when progfpga works fine, then the Pano G2 will boot your custom bitstream the next time, and... you will lose the ability to reuse progfpga ever again.
Is that correct?
Or is there a way to force the Spartan 6 to boot from the golden bitstream, e.g. by pressing the power button or something?
Or is there a way to force the Spartan 6 to boot from the golden bitstream, e.g. by pressing the power button or something?
Now about pano_ldr.
I'm looking at the SPI flash memory map.
I would expect to see 3 images:
- the multiboot image (which contains pano_ldr)
- the golden image (which also contains pano_ldr)
- the application image
I'd also expect the sequence to be as follows: - FPGA boots the multiboot image (pano_ldr)
- When autoboot is enabled, pano_ldr immediately load the application image (when the Pano button is not pressed.)
However, I don't see where this application image is stored in SPI flash?
As to where to load the application, that depends on if it's a Rev B or C. There's isn't much choice on the Rev C since there isn't enough flash for 3 images so I'd use put it in the golden image slot. On the Rev B I've been using 0x900000 which retains the original golden image (unless you make a typo like I did and enter 0x90000 instead!)
For my non DZ22 projects I'm planning on flashing pano_ldr @ 0 and dispensing with the multiboot feature. Unless pano_ldr is updated frequently I don't see it as a big issue. For my DZ22 projects I'll leave the original golden image in place just in case.
Not too fast, I'm not back yet: in Rome right now, but flying back on Sunday. :-)
For my non DZ22 projects I'm planning on flashing pano_ldr @ 0 and dispensing with the multiboot feature.
Ok. So you're not using the multiboot as defined by the Xilinx documentation, but you're still using ICAP_SPARTAN6 to kick off an application bitstream load that's located at some different address.