now if I could plug into the brains of @emard, @daveshah1 and other more experienced FPGA guys, here's my question. with SSD1331 I'm pretty much shifting bytes into SPI, thus what I need is a PISO (parallel in, serial out) shift register, right? my requirements are:
here's how I do it now. it does the trick yet it looks clumsy and I feel there should be a more elegant (and generic) solution for such a common problem. please point me to the right direction.
I forgot how the code works
exactly my point )
make
in /ulx3s-passthru/proj/ulx3s-v2.0-12f