@emard It was with the Digilent PS2 Pmods that I had to use an external 5v supply, mainly with a Microsoft wireless keyboard. They have a connector specifically for that.
@emard The trellis-compiled version of Oberon builds and runs for me and the HDMI out and mouse works. I will need to find a board I can connect a USB Pmod to, to get a keyboard. (One of my 12Fs has a broken us2, and one has no headers soldered, but I can use a 45f or 85f).
I soldered the header on my new USB PMod and now have both keyboard and mouse working on my 45F.
If only I could remember how to use the Oberon Gui.
The us2 port breaking seems to be a relatively common occurrence and I have often felt uneasy about the torque forces on it with bulky microUSB to standardUSB to PS/2 converter plugs attached. A PMOD is I guess the safer approach.
I now use flexible usb otg cables on @emard's suggestion as they put a lot less strain on the us2 connector. If my soldering skills were better, I think it would be easy to replace the connector.
I'm also a bit wary of repeatedly plugging / unplugging from these ports. I don't have a compact connector but these adapter cables get the job done. I have a few for other boards too, I don't unplug the board-side at all now
The OTG cable is a good idea. Looked at Mouser and it would seem that the ULX3S is sold out, except for a handful of the 12F boards. Wow, that is a major success!
It looks like we will get lots of interesting projects from the new users.
The ULX3S becoming widely available now is good timing! I've published a small demo of my game now, here's a video with a few thankyous at the end to people here that enable this sort of project:
https://twitter.com/danrr_au/status/1314844897225048066
I think it was @lawrie or @emard that suggested publishing bitstreams/binaries, I've added a set of them on the github releases page so no need to build from source anymore. The binaries assume 85F + 16MByte of flash, confirmed ok on winbond and hopefully ISSI too
Well, not sure if any recent revision of ULX3S has less than 16MByte of flash to begin with. Do they? In my case the user program will fit on a board with only 4MB of flash, it's just the audio tracks that eat a lot of space
@charlesap I wanted a clean-slate platform for exploring architectural concepts, integrated in one system, that have been explored elsewhere separately. I have a grab bag of ideas taken from lots of other systems that are probably mutually incompatible but we'll see.
That is an interesting approach. My own related take on that is "How would you do Unix on early 80's hardware when you have all the knowledge of today, but sticking to Thompson/Ritchie views on minimalism" Chances are that the answer will be a lot like Plan9 with different networking, but we'll see.
That is an interesting approach. My own related take on that is "How would you do Unix on early 80's hardware when you have all the knowledge of today, but sticking to Thompson/Ritchie views on minimalism" Chances are that the answer will be a lot like Plan9 with different networking, but we'll see.
@danrr_au_twitter thanx for this great game, I like motorized vehicle :). For flash make sure you drive unused lines flash_WPn=1 and flash_HOLDn=1 to prevent crosstalk otherwise ISSI 16MB will not work. Yes there exist 12F with 4MB flash so when possible, use lower address space first 4MB 0-0x3FFFFF
for plugging US2, always use small wire OTG adapter like on your picture. Never use monolythic adapter, small tug on the USB device cable and US2 is easy to break especially with unleaded solder
Oberon gui, you can hover with mouse on some text. Push middle button/roller and text will get underlined. Release middle button it will execute, the same as if you had typed the underlined text to the prompt
So for example point to "Hilbert.Draw", and click middle and it will draw maze on left window. Sierpinski needs to be compiled first, this should be also easy but its a bit more advanced :)
Typing commands to the prompt is click left to point block cursor on some free space. Click right to bring backslash cursor looking as slanted "1". Then type command and I guess enter or middle click should execute it
Here's a link for a quick preview of Oberon (online emulator):
https://schierlm.github.io/OberonEmulator/
I see there is a disk image with @charlesap 's version available as well
https://schierlm.github.io/OberonEmulator/
I see there is a disk image with @charlesap 's version available as well
Thanks @emard, I checked my boot code and it only drives the single SPI output until it starts using quad read commands, then it drives the 4x IOs as needed. I'll change that later to hopefully fix ISSI support
@danrr_au_twitter yes at initial 1-bit mode you have to force wpn=1 holdn=1 and ISSI flash will be happy
@charlesap we'd like to have same SD card for as much as possible, currently we have p1=vfat, p2=linux, p3=linux_swap, can we have p4=oberon and what is oberon's idea of partitions at all? I imaged first oberon then I formatted vfat and oberon still boots but I'm afraid sooner or later it will be overwritten by fat
@lawrie thanks for the new bitstream ! i now have the ESP32 and Linux on Saxonsoc talking to each other through an UART, and have noticed no problems with SD card yet
@emard Oberon currently has no idea of partitions, just a constant offset from the beginning of storage, baked into the kernel. It is always at the same offset, with the same limit. There is space for a small vfat partition before it and more partitions can be placed after it. Alternatively Oberon can simply be recompiled for a different offset. I can do a little technote on how that works, Oberon can certainly co-exist with other partitions on storage.
@charlesap great, if we know the default size and offset perhaps we can recommend a fdisk partitioning scheme that create unused partition for oberon and other systems will leave it intact. I have just read about https://ouroboros.rocks and I guess adding some net to oberon would be great. Mostly we just need to copy files to/from it.
I have tried https://schierlm.github.io/OberonEmulator/ and I think that ulx3s mouse support has swapped left and right btn :)
@emard I now have SDRAM working with the TI-99/4A core. I am using @pnru_gitlab controller, a little customised. I have done my updates on my development tree, and haven't committed anything yet. I need to integrate the OSD stuff as well. A couple of questions: is the OSD protocol documented somewhere? And then on the ULX3S boards out there, I only have 85F versions (currently using the older 3.0.3 for development). If I remember there are versions with the 12F chip, which actually can be configured as 25F? The reason I am asking is that I want to know how much block RAM the core could use. With SDRAM working there is no shortage of RAM anymore :) but I need to see how to bootstrap the system. One extreme is to use SDRAM for everything except video memory, but then even simple booting needs ESP32 support. So I am thinking to include only minimum ROMS and VDP RAM on chip, and put everything else off chip.
@emard your suggestion is in fact the easiest way to do it, I'll go find those values. I'll have to check out Ouroboros, I'm always on the lookout for a simplifying abstraction. Meanwhile Oberon does in fact have some simple client-server networking code (not tcp/ip) that could be enabled on the ulx3s, and also pcreceive/pcsend utilities that transfer files between an running Oberon instance and a host over serial. What I do though is use a program that constructs an Oberon disk image from a collection of files on the host, including the booting kernel binary. The same tool can take a disk image apart and place the contents in a directory on the host. This way I keep my Oberon files in git repos with the ability to roll back changes. Eventually of course I'll want to give FPGA Oberon a simple tcp/ip stack unless someone else beats me to it! I imagine a ring buffer fed by the esp32 or a simple PHY pmod implementation would be a place to start.
@Speccery GREAT news! 12F=25F so consider as if it is 25F. OSD protocol is the same as protocol for SPI-RAM chips with 4-6 MHz SPI clock and 32-bit address. Difference is that read command on our OSD read first one dummy byte and then data bytes, while true SPI-RAM chip starts delivering data bytes immediately. This is because dummy byte makes core simpler and shorter. There are few addresses mapped like 0xF100..0 for IRQ state, 0xFB0..0 f input BTN state, 0xFD0...0 for display charmem - thats OSD, 0xFE0..0 to enable/disable OSD, 0xFF..F to control lines of CPU (reset,halt, depends on design) and usualy 0x00.. to fill emulator memory, ROMs etc also depends on design of emulator.
@charlesap aha if there is serial transfer option, then ESP32 can be on the network and send/retreive files to oberon. Our ESP32 has small ftp server in micropython and the file transfer could be integrated to this server then we could ftp to oberon using serial protocol running on ESP32 side :)
@emard thanks I will continue using your previous work on the OSD stuff as basis, I am sure that is correct ;)
Yes yes that would be OK. I can "upgrade" later if I see some of remaining bugs, usually it's some rare condition when IRQ misses a btn press or generates multiple of it
@Emard I think there are only 4 primary partitions in the table? Or is my thinking too old fashioned?
The reason I ask is because in a few months time there may be many projects that all want a slice of the SD card. I can imagine that p1 is always fat and for general / ESP32 use. p2 can be for linux, as I assume that all Linux projects can share a single disk image, but I could be too optimistic here. p3 can be scratch space for any project, including linux swap. That leaves p4 as the only remaining primary partition. Maybe the simplest solution is for p4 to be shared between projects, with each project getting a certain, fixed range in p4. For instance first 32MB is for Oberon, second 32MB is for 4.3BSD, third is for Cortex, etc. Maybe there are other, better plans.
@pnru_gitlab yes there are 4 primary partitions while 4th can be made "extended" and p4 will be skipped and allowed existence of several others 5,6,7... technically we should skip 4
@charlesap additional on oberon and other ETH networking, I'm fond of RMII PHY. It is 100 Mbit ETH, 50MHz clocked 2-bit raw wiredumper, obtainable for 2$ from ebay called LAN8720 module, directly pluggable to ULX3S
@blitz I don't think I really answered your question on documentation on SaxonSoc. I think you have seen the README on using my pre-built binaries and the README on building from source. If you are interested in developing with SaxonSoc, you need to learn SpinalHDL, which has quite good documentation at https://spinalhdl.github.io/SpinalDoc-RTD/ (although out of date is some places). The two main things that were added for SaxonSoc are the generator framework, which is described here - https://spinalhdl.github.io/SpinalDoc-RTD/SpinalHDL/Libraries/generator.html, and the Banana Memory Bus, which is described in this README - https://github.com/SpinalHDL/SaxonSoc.
@emard Yes, using the standard partitioning scheme is useful as that is widely recognised. It is a bit harder on the boot loaders - instead of just reading sector 0 with the MBR it has to potentially follow a chain of sectors to find its partition(s). Maybe I am over-complicating things....
@pnru_gitlab I think that for OSes that require simplicity and don't like parsing msdos stuff, we can coordinate non-overlappling regions on raw SD sector offset where it starts and where it ends. And then we recommend a script for partitioning that makes such msdos primary/extended thing that follows the required offsets
Then we can have esp32 ftp> put image -o /sd@0x1234offset
@lawrie Is there a pre-built binary that converts SpinalHDL to synthesizable Verilog? Or is the only route to install Java, Scala, etc.?
@emard I am just thinking aloud. Upon reflection, following an extended partition chain is not very hard. What do other developers think? @Dolu1990 , @charlesap , etc. ?
I guess I should try on ESP32 to make a support for ftp that follows msdos partition scheme so we can put image to a partition number, not only the offset.
@pnru_gitlab Currently I just have just the bitstreams and image files in https://github.com/lawrie/saxonsoc-ulx3s-bin/tree/master/Smp. I could add the generated verilog files as well. The verilog is all in one file, but there are separate *.bin files from the BRAM initialization.
The problem with putting those in the repository is that they change frequently and there are different versions for different boards and other options.
@pnru_gitlab Currently, it is a SBT project so, to run it you need Java and Sbt installed.
Else, it is easy to produce a jar release file, which only need java to be run
Else, it is easy to produce a jar release file, which only need java to be run
Oberon related question, how to compile Sierpinski from java emulator webpage and e.g. Full image or Colorful image? I know I should do something like
ORP.Compile Sierpinski.Mod
But do I have to change to some directory and how this is done?
@pnru_gitlab I just realised I answered a different question, but @Dolu1990 answered the question you asked.
Could something like SubstrateVM be used to create a single binary SpinalHDL compiler (transpiler)
it might be possible, but i never tried such thing
@emard I managed to compile and run Sierpinski by a convoluted method. I selected *.Mod then ran System.Directory, then selected Sierpinski.Mod and then ran Edit.open, then selected the whole program and ran ORP.Compile @. Then closed the edit window and ran Sierpinski.Draw.
Did you make it on oberon java emulator or ulx3s board?
since you guys around SaxonSoc made such a great progress. I had to do my part of the promise.
Just released socks server for micropython at https://github.com/kost/micropython-socks
that means you can tunnel any SOCKS5 connection over ESP32
since micropython does not come with NAT support, that means you can go to the internet over ESP32 using SOCKS server.
Installation is simple if you have connected ESP32 already to the internet:
You have to run this on ulx3s repl shell:
import upip
upip.install('micropython-socks')
and then you can just simply say:
import socks
socks.start()Then you can simply from SaxonSoc test it with the following (or any other host):
curl --socks5 192.168.4.1:1080 http://ifconfig.co
Amazing! started socks on esp32 now I have to boot to saxonsoc linux and try there
Let me know if it works for you as it does not work for me :-)
kidding. It works, it is not the fastest, but it works. Managed to download complete nmap source over https which is around ~10 mb.
>>> upip.install('micropython-socks')
Installing to: /lib/
Warning: micropython.org SSL certificate is not validated
Installing micropython-socks 1.0.0 from https://files.pythonhosted.org/packages/14/26/fd27f2e4ff38bc2f85666030205e1a597705f7bfc8b1a5209299f2305e57/mic
ropython-socks-1.0.0.tar.gz
Error installing 'micropython-socks': [Errno 13] EACCES, packages may be partially installed
@lawrie . are you connected to the internet? esp32 can access http/https sites on the internet? This is my session on fresh ULX3s fresh version from the CS batch (v3.0.8):
>>> import upip
>>> upip.install('micropython-socks')
Installing to: /lib/
Warning: micropython.org SSL certificate is not validated
Installing micropython-socks 1.0.0 from https://files.pythonhosted.org/packages/14/26/fd27f2e4ff38bc2f85666030205e1a597705f7bfc8b1a5209299f2305e57/micropython-socks-1.0.0.tar.gz
>>>
@emard you can also test it via your laptop/host. Just run curl with socks server as your esp32
But I have no "curl" on my saxonsoc :)
@lawrie you can also manually install it. just grab socks.py and manually put it on the ESP32.
I have esp32 on wifi, saxon on eth and I can ping esp32
@lawrie maybe you already have socks.py file in /lib ?
It works from my linux PC (it has curl) so the esp32 has served socks5 webpage :))
@lawrie I have micropython 1.12
@emard for saxon recompilation session, I suggest to have tsocks, proxychains and curl. so, you can tunnel any application over SOCKS5, for example 'proxychains ssh user@host.on.the.internet"
I have tested pulling the bitstream
$ curl --socks5 192.168.48.183:1080 https://raw.githubusercontent.com/lawrie/saxonsoc-ulx3s-bin/master/Smp/bitstreams/ulx3s_85f_green_2core_saxonsoc.bit --output file1.bin
% Total % Received % Xferd Average Speed Time Time Time Current
Dload Upload Total Spent Left Speed
100 935k 100 935k 0 0 43727 0 0:00:21 0:00:21 --:--:-- 46644
speed is not amazing, but I did not play with the CHUNK_SIZE yet, for example. Probably there is space for optimization in many parts.
pull requests are welcomed, of course :)
My ESP32 flash memory was full even though it only has python files in. socks now installed via upip.
@lawrie you can always "compress" some of the files with mpycross. you have binary in ulx3s-core and ulx3s releases: https://github.com/alpin3/ulx3s-core/releases and https://github.com/alpin3/ulx3s/releases
it converts .py files to python bytecode. saves space and memory. more about it: https://pypi.org/project/mpy-cross/
I am not really sure what is filling the flash. I deleted several of the .py files used by osd, but still not much free space.
>>> os.listdir()
['boot.py', 'main.py', 'webrepl_cfg.py', 'uftpd.py', 'nes.py', 'ecp5.py', 'spiram.py', 'spi_ide.py', 'lib', 'osd.py']
>>> os.statvfs('/')
(4096, 4096, 506, 13, 13, 0, 0, 0, 0, 255)
>>>
Then maybe put new micropython with flash erase option?
I will probably have to.
It happened to me also sometimes. Micropython 1.13 has bugs listing files in ftp so I recommend better 1.12 (I complained they can't find :)
regarding mpy-cross, i had mixed results with it. You can "compress" some of the files, but not all. For example, some of the early versions of emards uftpd.py and sdraw.py I could, but then emard started using some specific micropython constructs which mpy did not like. Worst part is that you have to run mpy-cross, transfer the files to/from device and then point of truth is running "import" on the device itself and running the code. if it does not run, it does not work. No other errors/warnings, so lost my hair few times with it.
I started using "viper" mode which compiles mostly integer-only python to machine code, making it significantly faster.
I found "golden" rule of esp32 micropython: each source module should be less than 20K. Few K longer and out-of-memory
@emard you are correct in that you
ORP.Compile Sierpinski.ModYou can type that out and then you must middle-click on the ORP.Compile part of what you typed. Oberon separates the typing and the command invocation. There are no directories in the RISC oberon (a.k.a. Oberon-07) so you don't have to change directories anywhere. Of course the source code has to be there in order for you to compile it... you can see what source code files are there by typing
System.Directory *.ModOnce you have successfully compiled the module you can invoke it by middle-clicking on
Sierpinski.DrawOne of the things Oberon does is if you have an up arrow (typed with the ^ key) after many commands you can just highlight the target and click the command. So if you had ORP.Compile ^ somewhere and you had a directory listing with Sierpinski.Mod in it you could highlight (click down with the right button, drag across, lift up) Sierpinski.Mod and then middle-click on ORP.Compile ^
Same thing with System.Directory and Edit.Open For example, you can list all the source code files by highlighting *.Mod, then middle click on System.Directory ^, then highlight a module you are interested in, and middle click on Edit.Open and it will open in the main middle window. Mouse interaction is maximized re-using text already displayed on the screen.
@charlesap One problem I had is that the keyboard doesn't seem to support the
~ key.
I managed to compile Sierpinski.Mod a few ways.
@emard I am trying to produce a rootfs including curl. @kost Have you tried it on SaxonSoc? How did you get curl?
@charlesap Thanx for this great intro, It describes the practical workflow of Oberon. Good concept to combine mouse with commandline!
@lawrie new rootfs with curl and ssl support would be great! Using socks at esp32, saxonsoc could pull upgraded parts of itself from the github
As @lawrie observes, the ~ character is often used in Oberon commands as the delimiter character, much like ; in bash. For example ORP.Compile A.Mod B.Mod C.Mod ~ will compile modules A B and C. It is helpful to be able to type it!
Just released socks server for micropython at https://github.com/kost/micropython-socks
using socks is neat idea! i went with the following terrible (but working) construction for networking in Linux for now: SaxonSoc runs pppd over the UART, ESP32 runs a script that bridges the UART<->a TCP connection, another pppd runs on a server where the TCP connection goes to
Saxon gets a routable IP on the network this way through pppd's proxyarp … well, and it avoided needing a MicroPython with IP_FORWARD… the maximum baudrate that seems to work without breaking ssh key exchange negotiations is 230400
socks is great because it doesn't need IP_FORWARD so normal micropython downloaded binary just works
definitely not fast but at least i can copy files in now through ssh and it's somewhat more convenient for playing around with lcc and a editor than a single serial console
I am using LAN8720 ethernet, otherwise copying files was terrible. I shutdown saxonsoc, ftp to esp32 SD card, boot saxon and mount SD card and file was there... Not so practical
yes, i avoided that as well by not running pppd on the ESP32 itself but through a tunnel to the router
It is OK solution serial-over-tcp
What IP address do I use to connect to socks5 from SaxonSoc? Do I need pppd? It is some time since I did the serial networking.
I have currently saxon on the eth and esp32 on the wifi. So from saxon I can ping wifi ip of esp32 and there you can find socks5 too. Of course ppp could be used too but I guess you have your eth setup ready
but yes connecting an ethernet module definitely seems a better idea for performance, and practical, though maybe a faster link to the ESP32 would be possible? (through SPI?), i don't know, that would surely require a different firmware on the ESP32
If I am using an ethernet adapter, then surely I don't need socks5 via the ESP32.
:) of course but just to try that it works :). Here is my info on ppp (with socks updated now) https://github.com/emard/esp32ppp
I have currently saxon on the eth and esp32 on the wifi. So from saxon I can ping wifi ip of esp32 and there you can find socks5 too. Of course ppp could be used too but I guess you have your eth setup ready
hah 'the long way around'
I am a bit confused by all this. Surely the only point of using socks5 is if we are using serial networking to the ESP32.
Yes, so my slightly outdated esp32ppp explains how to run ppp on wifi_gpio16,.17 then connect saxon with pppd to ttySL0 which should correspond to wifi_gpio16,17 and that should be fine. But currently no "pppd" on saxonsoc rootfs
right i think the idea is to run ppp from Saxon<->ESP32, then to use socks over that point to point connection
I am currently building the rootfs with pppd as well as curl.
Yes techincally first socks.start() should be running on esp32 then start ppp on esp32. within few seconds, you must start pppd on saxonsoc and they will connect
I can't remember ste command to run pppd on SaxonSoc.
fwiw i found out that the rootfs built by https://github.com/ulx3s/ulx3s-saxonsoc has pppd, and copied mine from there
Do I still need your ppptun on the ESP32? That is, should I run both ppptun and socks5?
yes
Yes "ppptun" should be maybe equipped with first starting socks server if its not already running
stty -F /dev/ttyUSB0 raw
pppd /dev/ttyUSB0 115200 10.0.5.2:10.0.5.1 noauth local debug dump defaultroute nocrtscts nodetach
Something similar should be on saxonsoc pppd
that works, except /dev/ttySL0 instead of /dev/ttyUSB0
@kost can I multiply start socks.start() and it is smart enough to do nothing if one already running?
@vmedea Yes, PPPD got lost in the Smp version.
And then the IP address I used for socks5 is 10.0.5.2?
or Maybe the other one 10.0.5.1
10.0.5.1, i think
it's
<local_IP_address>:<remote_IP_address>
Thanks
pppd doesn't seem to be connecting:
sent [LCP ConfReq id=0x1 <asyncmap 0x0> <magic 0xb3aef770> <pcomp> <accomp>]
sent [LCP ConfReq id=0x1 <asyncmap 0x0> <magic 0xb3aef770> <pcomp> <accomp>]
sent [LCP ConfReq id=0x1 <asyncmap 0x0> <magic 0xb3aef770> <pcomp> <accomp>]
LCP: timeout sending Config-Requests
Connection terminated.
Modem hangup
There should be no more than 5-10 seconds from starting of esp32 ppptun to starting of saxonsoc pppd. I wonder how to practically do it if we are at esp32 prompt and then boot saxonsoc
Worked if I didn't start socks.
You wanna say that after socks.start(), pppd won't connect and without socks.start() pppd connects?
Yes
Can you upload compiled pppd binary so I can try the same
I will use replsh to control esp32 and start ppptun
But that pppd stops me doing anything else in that terminal, so should I run it with screen?
Maybe! But I guess after it connects it will let you continue or it has some bacground option too
Remove "nodetach" and it should run in background
Is there pppd executable on saxonsoc-bin somewhere?
I don't seem to have curl despite including the buildroot package. There was something odd about it having been renamed.
I have put the new rootfs.tar in Smp/images.
wow
But, as I say, curl is not there, but pppd is.
OK pppd is what I need now to check what's about connection
for me, it immediately connects. But as I said, I control esp32 over replsh -p replsh_passwd esp32_ip_addr in order to start ppptun and quickly after pppd from saxon
replsh -p 1234 192.168.48.183
>>> import socks
>>> socks.start()
[1] Server started [0.0.0.0:1080]
>>> import ppptun
usage:
p=ppptun.ppptun()
... PPP traffic at RX=GPIO16, TX=GPIO17
del p
>>> p=ppptun.ppptun()
PPP tunnel
quickly after max 5-10 sec at saxonsoc
stty -F /dev/ttySL0 raw
pppd /dev/ttySL0 115200 10.0.5.2:10.0.5.1 noauth local debug dump nodefaultroute nocrtscts nodetach
Using interface ppp0
Connect: ppp0 <--> /dev/ttySL0
sent [LCP ConfReq id=0x1 <asyncmap 0x0> <magic 0x5465e24b> <pcomp> <accomp>]
rcvd [LCP ConfReq id=0x1 <asyncmap 0x0> <magic 0x652e3dee> <pcomp> <accomp>]
sent [LCP ConfAck id=0x1 <asyncmap 0x0> <magic 0x652e3dee> <pcomp> <accomp>]
....
local IP address 10.0.5.2
remote IP address 10.0.5.1
...
root@buildroot:~# telnet 10.0.5.1 1080
Connected to 10.0.5.1
socks server is alive, now we just need suitable curl, wget or similar with socks support
netcat would be nice to have in the root fs too, fwiw it can make use of socks as well
Absolutely, good idea!
A version with curl should be there now. I will look at netcat tomorrow.
Doesn't seem to work for me. I either get:
curl: (6) Could not resolve host: ifconfig.co
or if I give it an IP address it hangs.
I am doing
curl --socks5 10.0.5.1:1080 http://ifconfig.co
@emard Oberon expects it's "partition" to start at 512-byte sector number 524288, which is byte offset 268435456. Oberon won't touch the first two 512-byte sectors of it's own partition so it's become a convention in some Oberon emulators to leave off the first 268436480 bytes , resulting in a shortened disk image. You can tell you are working with a shortened Oberon disk image if it starts with 8d a3 1e 9b which is the on-disk representation of the directory sector mark, 0x9b1ea38d. The current RISC Oberon kernel will only address 67108864 (67MB) of on-disk storage due to an internal sector table limit, although the on-disk structures should allow a volume size of 141 GB if that sector table limit were removed. It is safe for now to expect Oberon to only use 67 MB of disk space... nobody has removed that limit yet in RISC Oberon.