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    emard
    @emard
    Even if we get 3340 PHY, we would have heavy FPGA core handling VFAT and protocols, that's why ESP32 is easy way to offload core development with benefit of programming convenience and in many cases slow speed is acceptable for what we do
    e2kgh
    @e2kgh
    @emard: you know this on github:
    emard
    @emard
    I know and I could get 3340 to work only as sniffer but not as host or device.
    e2kgh
    @e2kgh
    And, I thought, all the USB protocol could be done in a small microcontroller, which sits in the FPGA to, would be a common block for all designs, like the ESP interface?
    emard
    @emard
    That for sure is possible and orangecrab is demonstration of how good can it work
    emard
    @emard
    @pnru_gitlab SD card 4-bit additional: one card didnt wanted to work, I have explicitely set ESP32 CPU to run at 240MHz instead 160MHz default and now this SD card mounts well also in 4-bit mode
    from machine import freq
    freq(240*1000*1000) # 80/160/240 MHz, faster CPU = faster SD card
    promach
    @promach
    does open-source lattice tool have real-time signal capturing capability like what Altera SignalTap or Xilinx ILA/chipscope do ?
    emard
    @emard
    no but for ULX3S we have scopeio https://github.com/hdl4fpga/hdl4fpga I debugged usb-host with it. VHDL too advanced for openosurce to compile, need diamond
    promach
    @promach
    drr
    @danrr_au_twitter

    More fun with audio + ULX:
    https://twitter.com/danrr_au/status/1293501360021757952?s=20

    Also saw this VHDL encoder for HDMI video + audio, I noticed you had a fork for this @emard but from a few years ago. Did you have success with this on the ULX?
    https://github.com/emard/hdmi-audio

    I'll run it through GHDL + yosys at some point, HDMI video/audio is ideal and the interface on that module looks pretty much the same as the one I currently use , but with bonus audio

    emard
    @emard
    This source is problematic has some logical loop and written by C-style programmer. It works good only on altera. Needs to be rewritten or new source found that is clean and portable
    Paul Ruiz
    @pnru_gitlab
    In the Fall I'd be interested to take a look at that HDMI-audio code. At some point I would like to understand the details of HDMI data islands and the lot.

    For the mini-Cortex I have the IDE emulation working - it can now load the 2nd stage boot loader from disk and that stage can load the kernel from disk. Haven't done the MMU yet, so there is where it currently stops. @emard In your OSD code you have this:

        self.irq_handler(0)
        self.irq_handler_ref = self.irq_handler # allocation happens here
        self.spi_request = Pin(0, Pin.IN, Pin.PULL_UP)
        self.spi_request.irq(trigger=Pin.IRQ_FALLING, handler=self.irq_handler_ref)

    Why is that necessary? It (Pin.irq) seems to work for me with just giving the function name as handler.

    Paul Ruiz
    @pnru_gitlab

    @pnru_gitlab SD card 4-bit additional: one card didnt wanted to work, I have explicitely set ESP32 CPU to run at 240MHz instead 160MHz default and now this SD card mounts well also in 4-bit mode

    Is there any downside to running at 240MHz (other than power)? Do some things break at that speed? If not, would it not make sense to always run at 240MHz??

    emard
    @emard
    @pnru_gitlab First call of the handler(0) is to catch some stale irq. Second line .ref is micropython trick to force allocation for a function before it will be called by interrupt (reduce latency). Third line sets pin status and pullup to avoid glitches if FPGA side is missing. Last line activates IRQ handler passing it already allocated function. If you change it and it works, it's ok :)
    ULX3S has plenty of onboard power so 240MHz is just fine. Some esp32 soc parts may scale (be clocked) with that frequency some are from bugs in micropython or IDF, some are normal.
    emard
    @emard
    If you manage to rewrite HDMI islands from scratch to work that would be great! It's some data delivered during blank signal. Monitors that don't support audio will either show garbled screen or no sync. Those that support will normally show picture and play audio
    emard
    @emard
    https://docs.espressif.com/projects/esp-idf/en/latest/esp32/api-reference/system/power_management.html here is a lot of ESP32 dynamic frequency control, I think main reason is power saving
    Paul Ruiz
    @pnru_gitlab
    Got the "mini-cortex" model booting ancient Unix. It is about 4 times faster than the SBC (double the clock frequency and a 16-bit bus instead of 8-bit). IDE simulation from the ESP32 works fine.
    emard
    @emard
    @pnru_gitlab wwoooww amazing project! Is the source on git with some download lines for disk image?
    I was playing with line draw hardware accelerator (a simple SPI controlled "GPU") https://github.com/emard/ulx3s-misc/blob/master/examples/lcd_st7789/micropython/st7789_240x240_spi_slave/proj/hdl/draw_line.v and demo is for LCD ST7789 which doesn't have built-.in hardware line like OLED SSD1331 has. Now it has 3330 lps
    Dobrica Pavlinušić
    @dpavlin
    @goran-mahovlic I'm also having problems with ENC28J60 and saxonsoc with ebay module and wires which used to work, so you pmod is probably ok, it's a software problem. I will try to go through all kost builds and find one which works for you
    Dobrica Pavlinušić
    @dpavlin
    @goran-mahovlic https://github.com/dok3r/ulx3s-saxonsoc/releases/tag/v2020.01.24 works for me, you can test ENC28J60 pmod using this image
    emard
    @emard
    when we are at saxonsoc, is there some chance for RTC MCP7940N i2c support, can we demonstrate that saxonsoc can boot with clock set, make hardware shutdown and wake up again from RTC. I have esp32 mictopython example for this https://github.com/emard/ulx3s-misc/tree/master/examples/rtc/micropython-mcp7940n
    Paul Ruiz
    @pnru_gitlab
    @emard Yes I will put all that on Gitlab in the next few days. At the moment the code still needs some cleanup and I'm chasing a few issues: I discovered that my CPU microcode for signed divide has a bug and also that I never implemented NMI (which is used for single stepping in the debugger - a bit like the "trap" status bit on a PDP11).
    Goran Mahovlic
    @goran-mahovlic
    @dpavlin tnxI will check, as I did recheck everything and did not find anything wrong wirh PMOD
    Goran Mahovlic
    @goran-mahovlic
    Working.png
    @dpavlin tnx - it is working :)
    Paul Ruiz
    @pnru_gitlab

    I've now cleaned up the source and posted the repo for the Mini Cortex project. It is located here: https://gitlab.com/pnru/cortex
    Let me know if it works on other boards too.

    If there is an emerging standard for how to organize projects on the SD card let me know, and I'll try to conform.

    emard
    @emard
    AMAZING!!! I will check this. Usually something like /sd/cortex/disk/idedisk.img /sd/cortex/bitstream/tms99xx.bit or similar
    Important is that it works :)
    Paul Ruiz
    @pnru_gitlab
    OK, I'm close then: I now put both the bit file and the disk image in /sd/cortex. The python disk routine (spi_ide.py) is in the root directory.
    The python code could probably be a bit more sophisticated: now if uftpd programs the FPGA, the spi_ide code gets a deinitialized SPI driver and barfs.
    emard
    @emard
    I can take a look at python and optimize if necessary. This spi sharing between different applications and pinouts is expected. It could be fixed but sometimes its better to have simple code than some commodity
    emard
    @emard
    HEY, this thing is even FAST and very responsive. IDE emulation is incredibly simple and everything works. WOW! I will see if anything could be done to this pinout sharing with uftpd...
    emard
    @emard
    This stuff also has cc compiler (btw can saxonsoc also get something that compiles)
    What I'd also be "happy" to see if RTC can get supported. If TMS99xx board had some concept of RTC I guess we can make i2c core converter from onboard RTC to the RTC TMS99xx expects
    Kristin Davidson
    @aphistic
    Hi everyone! I'm super new to FPGAs but i bought a ulx3s today because I'm interested in both FPGAs and RISC-V and I've been reading that the ulx3s is a good board to experiment with RISC-V on. I also ordered an ssd1331 display module to put on the board as well. I'm wondering, is there anything else i need besides those two things and a micro usb cable to get started with both FPGAs and RISC-V on the ulx3s? Do I need anything to put between the display module and the FPGA to deal with heat? I've been looking at the linux-on-litex-vexriscv repo as a place to get the bitstream i need for RISC-V but since I'm so new to both I'm not sure what else I'd need. I don't plan on using linux because I want to work on bare-metal RISC-V and the only other bare-metal work I've done is using a stlink-v3mini and an STM32F3DISCOVERY board. Would the JTAG provided by the FTDI on the ulx3s provide the gdb "load" functionality to the RISC-V core like the stlink did for the STM32F3? Sorry for this being so long, I didn't want to split it into a whole bunch of different messages. :)
    Oh, and in addition to the question about heat related to the FPGA and the SSD1331 module, do I need anything else to stabilize the top of the display module or will the soldering on the bottom be enough?
    Martin Falatic
    @MartyMacGyver
    Is there any news on shipping estimates? I ask only because there is a chance my info might change before then depending on how far out that might be.
    Paul Ruiz
    @pnru_gitlab
    @emard Maybe the solution for SPI h/w sharing is to let spi_ide re-initialise the SPI h/w at the start of every request. Hopefully it is a very fast operation.
    emard
    @emard
    @aphistic SSD1331 96x64 is full featured OLED beautiful contrast, but currently best buy is ST7789 1.3" 240x240 LCD less contrast but more pix and less $. Do not solder directly the display. Solder female 7-pin header and plug the display. Mechanical stabilization can be 3D printed https://github.com/emard/ulx3s/tree/master/box it will "work" properly only if whole box is printed. There is no problem with heat normally to FPGA but SSD1331 with wrong software commands can become hot to fry fingers and smoke, it happened to me once, colors faded and I just replaced display. Onboard USB-SERIAL can provide 2nd JTAG channel for openocd debugger of RISCV processor it will work but it will be VERY slow (for debug single step ok, but for transferring Mbps no).
    emard
    @emard
    @pnru_gitlab SPI can be only channel 2 and some "cooperation" between uftpd, ecp5.prog and ide emulation should be done, but as your IDE code looks so clean and short, it's pity to bloat with large code. We must rethink is there some short coded and memory efficient python technology which would alllow it. Supposed ESP32 MPY wont crash internally, SPI could be re-initialized any number of times without de-initialization. By reinit you can change everything including pinout and frequency
    emard
    @emard
    @MartyMacGyver what I know is that 824 boards for CS campaign have passed self-test procedure and packed into boxes. Some bureau procedure from campaign is waited for otherwise shipment to US will already be done last week. Goran may know more details as he's doing it actually
    emard
    @emard
    @pnru_gitlab For ecp5.prog reinitialization is actually often done during JTAG as it must switch between software and hardware SPI. For IDE, if python can detect uninitialized/spoiled SPI it can then try initialization using try/except python syntax
    Paul Ruiz
    @pnru_gitlab
    @emard Doing the RTC thing sounds like a fun project. AFAIK there never was an RTC chip for the 99xx series, but maybe there was an RTC board in TI990 mini - I will look. The current Unix version has no support for it, but it would not be difficult to add a driver and read out the RTC on system startup. After that, Unix maintains its own clock: even now you will see the time progressing (use the date command for current time).
    @emard Had not thought of try/except - that is an excellent idea.