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    Paul Ruiz
    @pnru_gitlab
    Come to think of it - the 9902 was designed for a DTE role and assumes that it will always be faster than the modem. Hence it has RTS/CTS, but not DTR. For your convenience, maybe a hardwired DTR signal that reduces flow to ~9600 baud equivalent is the solution.
    emard
    @emard
    You mean a serial baud converter core, that would accept 115200 and with DTR signaling reduce it to 9600?
    And also retransmit at speed 9600 when communicating to TMS9902 side (FTDI side will be 115200)?
    Paul Ruiz
    @pnru_gitlab
    Yes. Thinking a bit more adding DTR to the 9902 is not very hard either: is should de-assert as soon as a character starts being received and re-assert after the CPU has read the byte. I cannot replicate that in vintage hardware, but it would be just a few lines of Verilog in the 9902 code. Just to be sure: which FTDI flow control lines are hooked up to the FPGA?
    emard
    @emard
    All FTDI flow lines are going to FPGA on ULX3S
    Ups sorry! Maybe NOT!
    Flow lines are used for JTAG aiieee
    Only RTS and DTR lines are available to userspace bitstream, rest goes to JTAG
    Paul Ruiz
    @pnru_gitlab
    Have to read up on my RS232 again. I always forget how RTS/DTR are hooked up after RS232 became symmetric. Originally RTS and DTR were used both to signal from the computer to the modem.
    emard
    @emard
    Yes by default those are lines when FTDI outputs to FPGA by default. JTAG lines are intentionally used all default inputs in order to be high-z if FTDI is untouched so that external JTAG or ESP32 JTAG will work
    So I guess there's no return line where FPGA can say FTDI to halt transmission. Theoretically linux driver can be altered to reprogram one of RTS or DTR as input and for a different purpose than default but that would lead us to much more complicated solution than just using 9600 :)
    Gopal Kankanhalli
    @gkankanh
    High Speed A/D conversion help
    First of all thanks for the fantastic work that you guys are doing.Amazing.
    Need some general advise/tips on high speed A/D conversion on ULX3S using on board MAX11125.
    Here is what I have learned so far. Use the internal clock @ say 300MHZ to drive the AD conversion.
    What is the most efficient way to transfer the samples to a host for analysis?
    ESP32 connection to a host using UDP may be?
    I feel Ethernet would give me more throughput.
    Comments appreciated. Thanks in advance.
    emard
    @emard
    @gkankanh MAX11125 is 1Msa/s total so e.g. if you use 4ch then each channel will be 0.25MSa/s per channel. For oscilloscope it, we have ready solution at hdl4fpga/ULX3S/scopeio you will see traces on monitor. For analysis, onboard USB-serial can do 3Mbps so it could be nearly useable. For faster ADC, yes 100 Mbit ethernet ETH8720 from ebay, module for 2.2$ and for example ebay's AN108 AD/DA module 32MSa/s input, 125MSa/s output https://www.ebay.com/itm/ADDA-Module-Data-Signal-Acquisition-High-speed-Directly-pluggable-connector-/253556250998 also scopeio supports it
    Gopal Kankanhalli
    @gkankanh
    @emard Thanks for the guidance.Appreciate it.
    emard
    @emard
    youre'welcome, I also added to MANUAL.md of ulx3s about the AD/DA modules. They costed $20 but now are expensive near 60$
    @pnru_gitlab https://github.com/emard/ulx3s-misc/tree/master/examples/rtc/i2c_master/proj here is small RTC i2c master example. It will display seconds on LEDs as BCD and full date/time on st7789 mini display.
    Paul Ruiz
    @pnru_gitlab

    Looked into early RTC chips. The first one seems to have been the OKI MSM5832, which was used on a few S-100 boards around 1980. It has an awkward 4 bit interface though. If I get around to a new SBC I will probably use the MM58167. The software interface is always the same: a bank of byte registers with the time / alarm / config data (and sometimes 50-100 bytes of nvram).

    @emard I am not sure which chip the ULX3S uses. The crowd supply page says MCP7940 but the schematic refers to the PCF8523. Both seem to have the same "bank of registers interface, though. If you can provide me with a verilog module that connects to the RTC chip and offers a bus interface similar to that of MM58167 to the CPU, I will integrate it with the Mini Cortex and write the Unix driver for it. I am not bothered if the registers don't match in number or meaning with the MM58167.

    It would be fun to have shutdown -r working on a V6 :^)

    Sometimes life is simpler than first imagined. I realized that 9600 Baud is about 1000 characters per second and the Cortex cannot keep up with even that. Luckily nobody types that fast. I did the change to the rom to set the half-bit timer to 4 clocks but the FTDI does not accept that - too far off. Then I also tweaked the internal clock of the 9902 by changing the divider from 25 to 27. Now it works fine at 115200. Just don't type at that speed.
    Paul Ruiz
    @pnru_gitlab
    The rom change is this:
    0460 0142 0009 0004 0012 0004 0023 0004 // 0x0080 // baud 115200
    0046 0004 008d 0004 0119 0004 02a4 0004 // 0x0090 // baud 115200
    7fff 0004 0d0a 4552 524f 5220 000d 0a45 // 0x00a0 // baud 115200
    emard
    @emard
    It is MCP7940N used now. Early v1.7 boards had PCF8523 but it was unreliable, forgetting time and MCP is cheaper and better. It has documented bug that setting time registers must be verified by read and retried until desired value is read there. The verilog module is here https://github.com/emard/ulx3s-misc/tree/master/examples/rtc/i2c_master/proj however it only reads RTC. RTC will start "ticking" after it has been initialized and for this we have esp32 and ntp: https://github.com/emard/ulx3s-misc/tree/master/examples/rtc/micropython-mcp7940n
    Verilog module can write also but I haven't implemented some "gui" for user friendly setup
    OH I see the comment refers to old PCF :)
    emard
    @emard
    It's speed of VCC fall time and MCP datasheet is in Note1 not "100%" shure how fast can it fall for reliable switchover to battery so I keep refering to PCF datasheet which "knows"
    emard
    @emard
    I can verify that your divider 27 and above ROM patch make cortex work at 115200. I promise I won't type faster than 1000 cps
    If I'm asked, this patch can go to mainstream :)
    Kristin Davidson
    @aphistic
    @emard thanks for the recommendation on the female headers for the SD1331 display! I wouldn't have thought of that but it makes so much sense. :)
    Kristin Davidson
    @aphistic
    @lawrie thanks for the insights on risc-v on ulx3s. :) i was thinking of following the linux-on-litex-vexriscv because i want to work on a hobby OS for risc-v in rust and thought it would be a good place to start because it comes with things like an MMU and other hardware. I don't mind learning new things (on the contrary!), though, so if it's better for me to start with something less involved and build something simpler to start with i could do that. for the usb to jtag programmer, do you have one you'd recommend? i've done some preliminary searching in the past but so far i've only gotten an stlink-v3mini and jlink edu mini, not a jtag device. i don't mind paying more than normal for a hobbyist for one but it is still a hobby, so i'm looking for something that's not too expensive. i think i'm jumping in the deep end here (my experience is software dev with a focus/interest in systems) so i'm still trying to learn what all a jtag, uart and the like do.
    Kristin Davidson
    @aphistic
    oh, and for the headers being soldered on the ulx3s I was trying to figure out the best way to do it. Should I have two rows on each side pointing "up" (fpga side), "down" (opposite fpa side) or one row on each side going both "up" and "down" so it can be used with either a bread board or some male-female jump wires... or even a row of female headers to use male-male jump wires?
    Lawrie Griffiths
    @lawrie
    @aphistic It is VexRiscv (written in SpinalHDL) which supports the MMU. LiteX is a collection of peripherals written in migen that talk to the risc-v cpu via a wishbone bus. Litex used to support a lot more peripherals than were supported by SpinalHDL but SpinalHDL with SaxonSoc is catching up fast.
    There are projects that support Rust using litex on the the Ulx3s board, such as http://pepijndevos.nl/2020/08/04/a-rust-hal-for-your-litex-fpga-soc.html
    There are pure SpinalHDL examples on an ECP5 board such as https://craigjb.com/2020/01/22/ecp5/. (That is not on a Ulx3s but porting is probably not hard).
    Lawrie Griffiths
    @lawrie
    If you are new to FPGAs you need to decide which HDLs to learn such as Verilog, VHDL, SystemVerilog, SpinalHDL, Migen, nMigen, Chisel. Or you may be interested more in the software side and want to build SoCs from a library of existing components.
    I have not tried Rust on an FPGA. I don't currently use Migen or nMigen, and I have delayed using LiteX as it uses the older Migen and I don't really want to learn both python HDLs. I believe it is in the LiteX roadmap to move to nMigen, but that may take a while.
    Lawrie Griffiths
    @lawrie
    I don't often use JTAG with my FPGA projects as there are usually better alternatives. When I did I mainly used the Lychee Tang programmer - https://www.aliexpress.com/i/4000042458146.html?spm=2114.12057483.0.0.38051d79Az7DT9
    But that is not the best supported one.
    emard
    @emard
    @aphistic I would recommend soldering MALE pins pointing DOWN. It is "compatible" with 3D printed plastic box. Standard IDE 40-pin cable can be used to connect and this cable you can either cut or recrimp to fit different modules. For protobard it needs some "inventions" perhaps obtaining male-female 1-row adapters or making flat cable to protoboard adapter by soldering male header to male IC sockets.
    @emard best programmer is to obtain FT2232 or FT4232 breakout board. It doesn't need to be exactly named JTAG programmer, but this FT2232 chip is all that is needed. try to optimize price and find some board with EEPROM onboard so you can program USB ID to make it be "recognized" as something vendor specific. Lattice and xilinx and all tools support natively FT2232 programmers. Im not sure is altera still living in stone age with some usb-8051 chips
    Lawrie Griffiths
    @lawrie
    @aphistic I tend to solder 90 degree female headers to my Ulx3s boards, as they work best with Pmods, but it depends what project you have in mind.
    emard
    @emard
    To have GP/GN not be swapped from "default" design, Either solder 90° FEMALE headers on top side of board (nice for PMODs directly) or straight 0° MALE pins down on bottom side of board. PMODs can also plug to other end of flat cable and pinout will be identical as if 90° was soldered onboard.
    Lawrie Griffiths
    @lawrie
    I have just tried nmigen on the Ulx3s and getting it working was a pain, but I now have a blinky.
    My first mistake was installing the m-labs version which I got when I googled nmigen. That version is out of date and did not support the Ulx3s. So I uninstalled that.
    emard
    @emard
    Wow I know installation is terrible but great. I have tried "Silice" (the one for DOOM engine). The installation is not needed, just one exe file which works everywhere and blinky quickly
    Lawrie Griffiths
    @lawrie
    I am using Ubuntu 20.04, so I need to use pip3 not pip. (You can't get python2 pip on 20.04 easily).
    The installation instructions for nmgen-boards says "Todo", so I installed it like the m_labs version said.
    I changed the blinky example to use ULX3S_85F_Platform and ran that. It complained that tool {} was missing.
    It seemed that it needed OpenFpgaLoader for upload, so I installed that, and then the blinky worked.
    Lawrie Griffiths
    @lawrie
    So this is the nmigen blinky:
    from nmigen import *
    from nmigen_boards.ulx3s import *
    
    
    class Blinky(Elaboratable):
        def elaborate(self, platform):
            led   = platform.request("led", 0)
            timer = Signal(26)
    
            m = Module()
            m.d.sync += timer.eq(timer + 1)
            m.d.comb += led.o.eq(timer[-1])
            return m
    
    
    if __name__ == "__main__":
        platform = ULX3S_85F_Platform()
        platform.build(Blinky(), do_program=True)
    emard
    @emard
    Wow, very pythonic :)