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    Lawrie Griffiths
    @lawrie
    You did all the hard work, adding Elf to the loader, fixing bugs,. rewriting malloc, getting the assembler code started, etc.
    Paul Ruiz
    @pnru_gitlab
    As to the PPP, in the last days of August I was working on that - I want to give the ULX3S Cortex network capability. It has a badly designed SLIP interface and I was looking at the learnings of that to come up with a more elegant PPP design. For the ESP32 part of that I'm still on 1.11 + patches.
    emard
    @emard
    @pnru_gitlab sometimes we slightly escape from HDL core design with retrogaming/computing/unixing, but when I take a different view I can see that all this effort is closely related to application of FPGA in multi-culti environment and it exposes problems, challenges and drives the research forward. For example to have linux with native compiler on FPGA we need to have a balance between LUT usage, kernel, suitable compiler and good deal of clever hacks
    Paul Ruiz
    @pnru_gitlab
    @emard Are you aware of the Loboris fork of Micropython? A few years ago this branch was significantly ahead of the main code base and offered WROVER /psRAM support. If remember well also true NAT support. I think Boris Lovosevic lives in Zagreb. Maybe an idea to meet for a coffee or a beer and see if he's interested in helping with a new custom build of MicroPython that fills in some of the missing features on WROVER?
    @Lawrie You did all the hard work Not really, and I got a self hosted RiscV tools chain out of it. In a far future I may want to build a simple Unix system on top of picoriscv.
    emard
    @emard
    @pnru_gitlab Hoh then I must find him locally and invite! You know similar thing happened when e2kgh told me about PDP-1 implementation https://github.com/hrvach/fpg1 Zagreb is not a big city I didn't know him so invited to make presentation and he made a blast https://www.youtube.com/watch?v=_umS3JwZm9k
    Too bad pdp-1 is only working on altera. Believe or not he educated himself for few months about FPGA, got the board and made the code. Very unportable but it was his first project and it worked
    emard
    @emard
    Back to ESP32-micropython yes it would be great to get a very some simple NAT, we don't need full iptables firewall, but just a plain simple replacement of IP addres for one internal address (that's our saxonsoc)
    emard
    @emard
    I emailed loboris and proposed a meeting to talk about esp32 and ppp nat internet for saxonsoc (probably me and goran for beginning :). Waiting to reply :). If he wishes to chat I will invite here too
    Lawrie Griffiths
    @lawrie
    I have mp3 music playing on SaxonSoc Linux now, and @Dolu1990 has fixed the DMA bug. I will put it in the Smp repository tomorrow.
    It needs a new version of the rootfs, as there is more stuff installed such as alsa and mpg123.
    emard
    @emard
    Auuuuuwww, Music, unbelieavable!!! in case there's a need for hi-fi sound, a relatively light SPDIF encoder is in ulx3s-misc example https://github.com/emard/ulx3s-misc/tree/master/examples/audio - Connecting ulx3s with cinch cable to orange colored input of home theater amplifier will provide crystal clear sound
    emard
    @emard
    esp32ecp5: micropython v1.13 has bug with uftpd file listing, last file is listed with wrong name. bug is in micropython "for fname in os.listdir():" iterator loop. Use v1.12 for now
    Lawrie Griffiths
    @lawrie
    I have a 4-cpu 85F SaxonSoc version with music, working now.
    Lawrie Griffiths
    @lawrie
    It is now inSmp/bitstreams/ulx3s_85f_blue_4core_saxonsoc.bit
    I renamed images as oldimages and the new one are in Smp/images.
    You need dtb, uImage and you need to untar the new rootfs.tar.
    You will also need:
    root@buildroot:~# cat .asoundrc
    pcm.!default {
        type            plug
        slave.pcm       "softvol"   #make use of softvol
    }
    
    pcm.softvol {
        type         softvol
        slave {
            pcm         "hw:0,0"      #redirect the output to dmix (instead of "hw:0,0")
        }
        control {
               name        "PCM"       #override the PCM slider to set the softvol volume level globally
            card     0
        }
    }
    emard
    @emard
    auuuuuu currently with me I have only green85f where I expect booting issues but I will try anyway.
    Lawrie Griffiths
    @lawrie
    To play music do: mpg123 -T -f 4096 -m file.mp3.
    Or to play in the background nohup mpg123 -T -f 4096 -m file.mp3 &
    It is set up for a 64MB blue 85f.
    emard
    @emard
    If 85F won't boot, is also 12F possilble?
    Lawrie Griffiths
    @lawrie
    Yes, I had a 1-cpu 12F version working. I will rebuild that.
    emard
    @emard
    Ill try both, something will work!
    Dolu1990
    @Dolu1990
    .asoundrc isn't necessary, it just add volume controles in alsamixer app
    I would suggest to not add the .asoundrc for single core versions, as it add quite a bit of overhead
    the -m of mpg123 is for mono, if the mp3 bit rate isn't to high, it might be fine in stereo
    (for single core)
    emard
    @emard
    can rootfs.tar be gzip -9 compressed, Im on mobile net here
    Lawrie Griffiths
    @lawrie
    I have added a gzip version
    There are now two dtbs: dtb.12f and dtb.blue85f
    The new 12F version is in ulx3s_12f_1core_saxonsoc.bit
    Make sure you get the 1core version as the 2core is still for the old version of the images.
    @Dolu1990 Yes stereo seems OK for me.
    Lawrie Griffiths
    @lawrie
    On a 1-core system, playing music slows down compiling with lcc a lot.
    Lawrie Griffiths
    @lawrie
    @emard I did not use -9 on gzip, but I just tried it and it makes practically no difference.
    emard
    @emard
    This is ok! Im getting it
    e2kgh
    @e2kgh
    Did we get any progress on the 32MByte, Green 85F?
    Is it really the flash? Probably it is easier to replace the flash chip then?
    @Lawrie : WIth all the versions floating around, any chance for a configuration string like "32MB,85F,4CORE", or similar? Or just three values for SDRAM, FPGA and NumCores?
    emard
    @emard
    We are not sure is it flash chip but is currently 1st suspect. We have not yet seen any board with this ISSI flash chip to boot saxonsoc, other things work. FLASH chip can be non-destructivelay desoldered and replaced (by users who have practice and tools).
    Regarding FLASH, currently I managed to maintain esp32ecp5 to use the same SPI FLASH commands to R/W all FLASH chips circulating around.
    emard
    @emard
    Something about FLASH is undocumented, for example some chips after WRITE ENABLE need to READ STATUS before ERASE or WRITE BLOCK. Some dont need reading status, some fail if status is not read at this point. I found it by experiment, pdf datasheet not descibing such behaviour
    Lawrie found that FLASH needs some POWER ON command before being useable
    Lawrie Griffiths
    @lawrie
    @e2kgh I You can now do SDRAM_SIZE=32 CPU_COUNT=2 saxon_netlist, and FPGA_SIZE=85 saxon_bitstream. Is that good enough for what you want?
    emard
    @emard
    Also we must be aware that lattice FPGA itself talks to flash initially and sends some commands and potentially leaves it in state different than power on default
    Lawrie Griffiths
    @lawrie
    @emard Yes, waking up the chip was one thing that I thought might be the problem. I had that problem with SaxonSoc on ice40 boards. I don't know if is that or some other issue that @Dolu1990 wants to test.
    If wake-up is the problem, loading the bistream from flash could possible fix it, as that might leave the flash memory powered on. On ice40 boards there is an option in the bitstream to say whether to put the flash chip to sleep or not after loading from flash, but I don't think ecp5 has that option. Alternatively doing something else that powers up the flash chip and leaves it on before programming the bitstream could fix it.