Where communities thrive


  • Join over 1.5M+ people
  • Join over 100K+ communities
  • Free without limits
  • Create your own community
People
Activity
    Joseph Tang
    @josephtang3_gitlab
    @lawrie thanks!!
    derekmulcahy
    @derekmulcahy
    When trying to build blink I get an error from ecppack
    Failed to process input config: unrecognised config entry .sysconfig
    I saw the previous discussion and installed the latest from the kost repository but it didn't fix it.
    Trying https://github.com/open-tool-forge/fpga-toolchain/releases ...
    Paul Ruiz
    @pnru_gitlab
    Thinking a bit more about fujprog on Catalina, and why ujprog was working for @Speccery This code in fujprog should have unloaded the unwanted kext:
    https://github.com/kost/fujprog/blob/master/fujprog.c#L898-#L912
    In ujprog the similar code does not have the user id checks:
    https://github.com/f32c/tools/blob/master/ujprog/ujprog.c#L753-#L759
    It would seem to me that the user id checks in fujprog are not correctly recognising sudo.
    emard
    @emard
    @goran-mahovlic esp32ps2 is here https://github.com/emard/esp32ps2 for oberon it should follow "pygame" to export both keyboard and mouse. I haven't long time used it so some pinouts between oberon and esp32 may need to be reviewed perhaps modified and recompiled
    Lawrie Griffiths
    @lawrie
    @derekmulcahy The problem is definitely due to prjtrellis being out of date, so I am surprised if @kost's latest build did not fix it. Are you sure you have that first on your PATH? Commenting out the sysconfig in the lpf file probably fixes it too.
    Lawrie Griffiths
    @lawrie
    I have been doing some more experiments with nmigen including converting a Verilog project that implements a tiny cpu. The syntax of nmigen really is awful compared with SpinalHDL, and SpinalHDL has much more capability.
    derekmulcahy
    @derekmulcahy
    Yes, it is an odd one. I had been building trellis/nextpnr etc myself for months now. I must have odd versions hanging around. I seem to remember an issue with a dynamic python library which I had to hack in the past. Can't remember what I did! The fpga-toolchain stuff works. I am reinstalling the kost builds and I will try to track it down.
    cool, sed commands to edit change the previous message, autocorrect put in lost, I gave the sed command to change it to kost and it fixed it in my previous message. Gitter rocks!
    Erik Piehl
    @Speccery
    @pnru_gitlab your analysis is probably correct on the id checks.
    Andrew E Wilson
    @AEW2015
    Is the PWR button supposed to do anything? I just programmed blinky and PWR button doesn't seem to do anything.
    Goran Mahovlic
    @goran-mahovlic
    @AEW2015 if you have RTC battery and selftest and use US2 as power source you can turn off board and it will automatically powered up, and you can power it down with "power" button - except that - it is just button
    it is just opposite logic from all other buttons
    emard
    @emard
    @AEW2015 PWR can be used as normal button but it's logic level is inverted, 0 when pressed. When RTC is set up board can enter shutdown state and then pressing PWR can wake board up. Saxonsoc linux has complete support for RTC and then you can see how PWR works
    PWR can be also used as hardware-trigger to next multiboot image if D28 diode is mounted. By default D28 is not mounted to be able for PWR to be used as normal BTN
    Andrew E Wilson
    @AEW2015
    Thanks,
    What is the best way for communication over US1? is uart possible?
    emard
    @emard
    Yes US1 supports USB-RS232 all standard speeds like 9600 or 115200 and few additional faster maximal is 3Mbps = baudrate 3000000
    Andrew E Wilson
    @AEW2015
    @emard is it just the pins for FTDI_TXD/RXD? What about the host side? is special software required or can I just use screen or putty?
    emard
    @emard
    Yes TXD/RXD are enough (and few other control lines are also connected to FPGA maybe they can be useful). You can connect using 
    screen /dev/ttyUSB0 115200
or sometimes also this works:
fujprog -t
    note in our "official" constraints about directions. ftdi_txd is TX of FTDI and input to FPGA. also ftdi_rxd is RX of FTDI and should be output from FPGA.
    Andrew E Wilson
    @AEW2015
    @emard Thanks! fujprog -t just worked on windows (D19 led blinks), just need to find an example with uart or write my own.
    emard
    @emard
    Easiest example is to compile loopback 
    assign ftdi_rxd = ftdi_txd;
    Andrew E Wilson
    @AEW2015
    Any suggestions for connectors to get for the PMOD set?
    Also, do those PMODs have schematics on github?
    Goran Mahovlic
    @goran-mahovlic
    @AEW2015 yes, but I made a few changes recently on HDMI
    https://github.com/goran-mahovlic/ulx3s-PMOD
    @AEW2015 did you bought board in campaign or pre order one?
    I am asking as campaign order should include this https://www.crowdsupply.com/img/d9eb/ulx3s-connectors_png_project-body.jpg
    It may be shipped in additional package - for some reason...
    That are connectors I would recommend, but @emard has different approach
    Andrew E Wilson
    @AEW2015
    I did it through the Campaign, got a box with blank pcb, ULS3S, and the pmods, but no connectors like listed above. Should I wait for another box? I never got a tracking number.
    Goran Mahovlic
    @goran-mahovlic
    yes, you will get it separately at some point - if not please let me know so we can send complains
    Andrew E Wilson
    @AEW2015
    yea the paper inside, says a item is pending, I assume its that.
    What software do you use to view sch files?
    Goran Mahovlic
    @goran-mahovlic
    kicad
    and yes I need to include pdf - that is missing - will do it tomorrow
    there is also suggested connector place on ULX3S - for USB PMOD you will connect it to top right corner - so it can get 5V
    and for GPDI (HDMI) best way is to connect it to bottom left corner
    on that place you can get input working - on other places you can only do outputs
    Andrew E Wilson
    @AEW2015
    is the reason known?
    Goran Mahovlic
    @goran-mahovlic
    yes, at bottom left corner is differential clock capable pin - and we need that for clock input
    Andrew E Wilson
    @AEW2015
    That makes sense. I was going to try an input -> output video filter as one of my first project.
    Goran Mahovlic
    @goran-mahovlic
    that is hardest thing to get :)
    from all projects - we have some examples - but you still need to adjust phase with buttons to get it right ...
    Andrew E Wilson
    @AEW2015
    I have done it a lot with the Xilinx Pynq but will have to figure out the Xilinx IP i used and if I can get VDMA working with the limited ram on this board.