I read about very simple code to use the ram ?
I am not sure if you are referring to the sdram controllers I did two months ago. I think they are simple, 150-170 lines of verilog. There is a 68K controller that is free running versus the CPU clock and a 99K controller that is synced to the CPU machine cycle. Both are variations on the same theme (and derivatives of a controller that Lawrie suggested).
https://gitlab.com/pnru/ulx3s-misc/-/blob/master/M68K/sdram.v
https://gitlab.com/pnru/cortex/-/blob/master/sdram.v
Happy to help if you have any questions. If you referred to something else, no harm done.