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    Paul Ruiz
    @pnru_gitlab

    @lawrie I am still fairly swamped with work stuff. For retro-video my preference normally is to adjust the video circuit to a modern resolution and scan frequency. Often this means doubling the pixel size both horizontally and vertically by repeating a pixel twice in succession (i.e. running the shifter at half the modern pixel speed) and repeating a scan line twice (i.e. skipping the bottom bit of the line number).

    That approach does not always work: for example in the ZX80/81 the video signal is largely software generated and there is no actual hardware to tweak. The standard signal could be faked, but a lot of clever software did custom stuff and would hence not work with hardware that emulated the standard software signal. In these cases taking the (often only half-compliant) PAL signal and doing a special converter circuit (either line based or frame based) seems the only way to do it.

    emard
    @emard
    But maybe ULX3S is good for this, at one point we will saturate FPGA resource and this is "signal" we've explored enougho with this platform and should move to next one :)
    Paul Ruiz
    @pnru_gitlab
    I only lightly skimmed posts in the past weeks. Did I see correctly that somebody did a proper module for HDMI (i.e. with data islands & sound encoding)?
    emard
    @emard
    Yes, there is already a fresh independent project for other boards xilinx/altera that claims to do audio islands (I haven't yet tried) and here is a member of this group that does his own reimplementation of audio islands from scratch for ULX3S (work in progress)
    @pnru_gitlab I had some ti99/tms99xx porting questions for you that know this platform or @Speccery probably it was about "looping" arcade game if some approach could be applied. I think there's no FPGA port to this, mister doesn't have it. Other than a game, it's not too much "scientific" so It's kinda enginerhr-gobbler :)
    emard
    @emard
    https://github.com/hdl-util/hdmi I think this project is actively developed for audio islands
    @splinedrive does his own audio islands for ULX3S
    splinedrive
    @splinedrive
    You have showed me the links a few weeks ago. Is nice! But I really want to extend 1 bit audio with 2 channels in the moment I rebuild tmds with periods and guards and I had some timing issues. Next would be to understand how the error correction of island data packages are working with bch. I don't simulate, I use only my logicanalyzer and verify my streams on 4 different displays. :) I hope I will finalize this. I want more to play with basics like multipliers, divisors, digital filters designs etc. But to integrate island as much more as to implement tmds-dvi.
    emard
    @emard
    This is how it should be done for real :) I never simulated anything, directly to hardware always :)
    splinedrive
    @splinedrive
    With yosys and with your ftpecp5 it is possible :)
    emard
    @emard
    I had similar adventure with USB core, 4 different mouses, recompilation and storage scope. Only the scope was core in FPGA itself, hdl4fpga project :)
    emard
    @emard
    Most of the time only a small part of core has bugs so isolating only that will make compile process faster and this is greatly improves speed of development
    hhahhaa all sides plugged with somthing :))
    splinedrive
    @splinedrive
    Haha :)
    emard
    @emard
    To reduce no.of.LEDs for debugging, I use st7789 spi display with HEX decoder core, a little less parts to plug in but it adds to compilation time.
    splinedrive
    @splinedrive
    image.png
    And I fight in the moment with this issue here. It is the same picture on different display. Today evening I reworked the complete tmds for hdmi and solved some issues.
    emard
    @emard
    What is the issue - the white border lines or different display makes different picture?
    splinedrive
    @splinedrive
    Yes, because I introduced preamble video and video guard. I know howto fixed it, but is a workarround.
    emard
    @emard
    White borders could be something like off-by one or off-by-2^n at the counters, when something what shouldn't be included to video (and belongs to border or islands) is gated with blank signal and enters video area
    splinedrive
    @splinedrive
    ok
    I know howto to fix it, when I introduce the preamble and guard 2 cycles before HorizontalTotal but makes no sense for me. Must be something else!
    `endif
           /*
           preamble video data period
           */
          /*else*/ if ( (vga_hcnt >= (htotal - (8 + 2))) && (vga_hcnt < (htotal - (/*8*/ + 2)))) begin
             encoding_type = ENCODING_TYPE_CONTROL;
             /* video data period */
             //  control_data_channel_0 = {vga_vsync, vga_hsync};
             /* ctl1, ctl0  = 1 */
             control_data_channel_1 = {1'b0, 1'b1};
             /* ctl3, ctl2 */
             control_data_channel_2 = {1'b0, 1'b0};
          end
            /*
            video guard band
            */
          else if ( (vga_hcnt >= (htotal - 2)) && (vga_hcnt < (htotal - (/*2*/ + 0) ))) begin
              encoding_type = ENCODING_TYPE_VIDEO_GUARD;
          end
            /* remaining control signals hsync, vsync */
          else begin
              encoding_type = ENCODING_TYPE_CONTROL;
          end
    
        end else begin /* !vde */
          encoding_type = ENCODING_TYPE_VIDEO;
        end //  !vde
    I hope I will find it today :). It is good if you have different displays and fpgas :)
    emard
    @emard
    Aha I had similar non-sense situation with me too. I'm never satisfied until I make code that is logically understandable. I was testing it multiplatform, had alteras and xilinxes and when code is non-understandable, it behaves different on different platforms. When debugged properly, all platforms start to work same and correctly
    splinedrive
    @splinedrive
    My problem is I read the standard and some other sources and then you have to try your own implementation and then you can learn a lot.
    emard
    @emard
    With above code, I don't know about econding to comment, but general approach is to use some register for checking is counter within some range that is set and reset to different comparsion of "=" operation instead of ">" && "<" because those operators involve arithmetic units, complicate routing etc. OK if it works and fits fmax, don't fix just make some TODO later note
    splinedrive
    @splinedrive
    Thats why I have 85F :) I have no idea how good yosys is in optimizing such expressions
    image.png
    I got the ranges from here
    emard
    @emard
    compilers won't optimize this, a man is required to reformulate algorithm to avoid ">" things when not needed. If counter is monotonicaly incrementing, then register set "=start" and reset "=stop" will replace ">" arithmetic
    reg in_range
    always @(posedge clk)
    begin
      if(counter == start)
        in_range <= 1;
      else
        if(counter == stop)
           in_range <= 0;
    end
    splinedrive
    @splinedrive
    Ok give me an example for:
    else if ( (vga_hcnt >= (htotal - 2)) && (vga_hcnt < (htotal - (/*2*/ + 0) ))) begin
    emard
    @emard
    always @(posedge clk)
      in_range <= counter == start ? 1 : counter == stop ? 0 : in_range; // save lines :)
    ...
      if(in_range)
    splinedrive
    @splinedrive
    Is unreadable!
    emard
    @emard
    :) but that's expresson to what really hardware "likes" to be made of when optimized
    splinedrive
    @splinedrive
    Ok! I have no idea! but htotal is known during compiletime.
    If something works I have to compare the RTLViews
    emard
    @emard
    start and stop condition may be also registers and not necessary constants known at compile time. Just note that in_range will be 1 clock delayed, so adjust -1 to start/stop ranges to make if(in_range) trigger correctly
    splinedrive
    @splinedrive
    Donald Knuth said: “Premature optimization is the root of all evil” :)
    emard
    @emard
    Yes, he gave tram station example: Q: help me at what station should I get off for traffalgar square? A: you should get off one station before I get off :)
    splinedrive
    @splinedrive
    :)
    Lawrie Griffiths
    @lawrie
    My Amstrad CPC is starting to work. The video seems OK now and the keyboard works if you type slowly. Keyboard losing keys is probably due to interrupts or clock speed, which I haven't looked at yet. I need to add audio and floppy disk - https://github.com/lawrie/ulx3s_amstrad_cpc
    Lawrie Griffiths
    @lawrie
    cpc
    Radu Stoichita
    @radu_stoichita_gitlab
    You are the boss 🐱
    emard
    @emard
    aaaaaaaaa oooooyea, I guess we need to choose what's repository games format and I got to make OSD cpc464 loading module in micropython :)))
    Lawrie Griffiths
    @lawrie
    I was planning to just support floppy disks and .dsk files, not tapes. But I haven't looked at the detail yet.
    This seems to be the file format - http://www.cpctech.org.uk/docs/dsk.html
    sylefeb
    @sylefeb
    @lawrie amazing to see a CPC on ulx3s, this was my first computer :-)