Where communities thrive


  • Join over 1.5M+ people
  • Join over 100K+ communities
  • Free without limits
  • Create your own community
People
Activity
    Lawrie Griffiths
    @lawrie
    This seems to be the file format - http://www.cpctech.org.uk/docs/dsk.html
    sylefeb
    @sylefeb
    @lawrie amazing to see a CPC on ulx3s, this was my first computer :-)
    @rob-ng15 @lawrie how are things on the PS/2 keyboard + Silice front? (I lost track these past few days due to other workloads)
    Rob S
    @rob-ng15

    Hi @lawrie @sylefeb I have a PS/2 keyboard that works with the ULX3s :) It is a KB2106C that I got from https://www.cclonline.com/product/76320/KB-2106C/Keyboards/CiT-KB-2106C-USB/PS2-Combo-Keyboard/KBD0426/

    Gives keycodes from the Silice using the PS/2 that @lawrie wrote, and works with the Jupiter Ace emulator. Very happy!

    sylefeb
    @sylefeb
    excellent!
    emard
    @emard
    @lawrie yes, floppy is the cool medium, only I see they complicate the format why so much science aiiieeee. For the tapes, how about to support single image loading, like c64/vic20 and similar. If we assume it's similar, then if we find what memory locations change after tape loading then we just patch ROM for this to happen and I suppose it's the minimal effort to get something. Of course only single part will load, multipart tapes won't work this way
    splinedrive
    @splinedrive

    Hi, I started today with diamond again. I am not an IDE guy. Where I can define parameters for synthesis like I would do in

    yosys -DMY_DEFINE

    ?

    emard
    @emard
    I think they are in some xml file, I have scripts in ulx3s-misc and makefiles for most projects tp compile same example source with both yosys and diamond eg. https://github.com/emard/ulx3s-misc/tree/master/examples/dvi
    splinedrive
    @splinedrive
    I thought something you can insert in the dialogs of diamond. I solved it with a `define in source code :(
    sajattack
    @sajattack:matrix.org
    [m]
    hey @emard, any interest in verilator for some of the ulx3s cores?
    I'm using verilator with sdl/imgui/opengl to do simulations with video output for a simple mister core I'm building, and wanted to do it for c64, but half that core is vhdl so it wouldn't work without some vhdl2vl, which made me think of ulx3s
    sajattack
    @sajattack:matrix.org
    [m]
    it makes development and debugging a lot better imo
    emard
    @emard
    @sajattack:matrix.org Great if you know verilator, I never used it (maybe lazy me). I have USB core and some keyboards don't work, they enumerate but keypress sends no USB report. There's a bug which I can't find. I would probably need real wire USB analyzer, but if you think verilator could help, that's cool to simulate. I think I have verilog-only version. Some is vhdl but its convertible to verilog with vhd2vl
    sajattack
    @sajattack:matrix.org
    [m]
    yeah I'm not sure if verilator is cut out for that one
    emard
    @emard
    for demo/example it is great if we had makefile for some other core for verilator, like dvi demo, hex decoder, spi display driver and similar
    sajattack
    @sajattack:matrix.org
    [m]
    emard
    @emard
    oho, I should take a look at this, I downloaded it but first I have to do some research about depedencies and installing them
    sajattack
    @sajattack:matrix.org
    [m]
    screenshot for added enticement
    sameerCoder
    @sameerCoder
    HI,
    is this group for pyroms ocean model?
    EnJens
    @EnJens
    emard
    @emard
    @lawrie I compiled amstrad for 12F, it booted out of the box! A small issue is that it looses keystrokes or I have to hold key very long in order to reliably accept it. Now I don't remember was original machine so lowsy (could be :)
    emard
    @emard
    OK - i just saw git log "partialy working keyboard" this explains
    Lawrie Griffiths
    @lawrie
    The problem is with the keyboard might be the interrupts, which are not frequent enough. They are currently one per frame but should be about 6 per frame. The algorithm for generating and clearing the interrupt is strange and I have not attempted it. The Mist/Mister uses an algorithm that was derived by reverse engineering the Amstrad gate array chip, but is produces strange verilog that uses lots of clocks. I will probably try something simpler. The clock speed and audio also needs work on it. I have been doing other things for the last week or so.
    Lawrie Griffiths
    @lawrie
    @emard I have pushed the changes to the interrupt handling and it seems to have the keyboard
    emard
    @emard
    HI! Thanx! Let me check it!
    emard
    @emard
    Info: Running main analytical placer.
    ERROR: Failed to expand region (0, 0) |_> (72, 50) of 12188 TRELLIS_SLICEs
    0 warnings, 1 error
    latest nightly build trellis has problem with 12F but I have 85F too :)
    emard
    @emard
    on 85F it builds but scroll doesn't work properly, instead of scroll text wraparounds from top but not on first column, strange :)
    Lawrie Griffiths
    @lawrie
    I have only run it on the 85F. I noticed it was close to the BRAM limit on the 12F. Yes, that scrolling issue is strange. I don't have any ideas on what could cause that.
    Lawrie Griffiths
    @lawrie
    @emard The scrolling problem is because I did not realise that the CPC used hardware scrolling with the CRTC, so I need to implements some of the CRTC registers.
    Lawrie Griffiths
    @lawrie
    @emard I have pushed a change that seems to fix the scrolling problem.
    emard
    @emard
    HI ok I will pull but am away from home, have board only, no monitor. from next week I can try cpc646 scroll on real monitor
    splinedrive
    @splinedrive
    Hi, could some one explain me or have code to use SB_PLL40_2F_CORE. I want to use 2 PLLs in ice40, but I found no examples. And why icepll will not generates the config for 2 clocks. If I get knowledge I would like to extend icepll with it.
    Simon Thornington
    @sthornington
    noob question - I am seeing strange failures in my design at higher clock rates. in my yosys/pnr output, the first clk max frequency is a fail, but the second is a pass. is this okay? or is a failure at the first time (prior to the slack histogram) still a real failure
    Lawrie Griffiths
    @lawrie
    I don't think it is a problem: nextpnr has just tried harder and made it achieve the clock rate. ( At least that is my interpretation). As nextpnr is rather pessimistic about FMax, a lot of designs that fail in the second pass still work.
    Simon Thornington
    @sthornington
    Ok. I think my problem is elsewhere then
    Lawrie Griffiths
    @lawrie
    @emard I have changed the Amstrad CPC pll to use a 16Mhz cpu clock, so I can divide it and run the Z80 at the correct 4MHz clock rate. However the real Amstrad CPC's gate array introduces some wait states, and I am not emulating that, so my version runs a bit fast, equivalent to setting the fast option in the Mister version. I am still using 25MHz and 125MHz VGA and HDMI clocks. All this makes it harder to support an SDRAM option.
    sxpert @sxpert is installing the tools on his brand new macbook
    sxpert
    @sxpert
    my CPU is getting a nice workout
    Simon Thornington
    @sthornington
    is it still the case that to try a build of the examples with the latest diamond toolchain (3.12) I must not use ecp5pll.sv ?
    sxpert
    @sxpert
    can't seem to get it to build with gui though
    sxpert
    @sxpert
    gah, nuked all my brew stuff with a messed up makefile ;(
    sxpert
    @sxpert
    there, fixed, that took a while
    emard
    @emard
    @lawrie I currently can't compile cpc464, tried 12F and 85F and got same error
    31.51. Executing JSON backend.
    ERROR: Module $paramod$17f8df79e41cf412d10145c627e098e0ef3768b8\TRELLIS_FF contains processes, which are not supported by JSON backend.
    @sxpert HI, glad to see you continue saturn cpu, is there something I can pull and try to compile
    @sthornington You can use ecp5pll.sv but around reported error line, there is comment about part of the source that should be put in the comment for diamond to swallow it. I just can't match same systemverilog source to pass both yosys and diamond