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  • Sep 23 2021 01:45

    umarcor on style

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Brian Padalino
@bpadalino
i wrote some python-like formatting package for vhdl-2008 .. and there was some interest in trying to see how useful it is, so i pushed the code here: https://github.com/bpadalino/vhdl-format
Brian Padalino
@bpadalino
added some default format specifiers so the f strings are a little bit easier on the eyes .. so now f("{} and {} and {}", f(3.2), f(200), f(1 us)) work with defaults
sckoarn
@sckoarn

numeric_bit-body line 1288

if ((L'length < 1) or (R'length < 1)) then
      assert NO_WARNING
        report "NUMERIC_BIT.""="": null argument detected, returning FALSE"
        severity warning;
      return false;
    end if;

the "=" function.

LRM page 121, "In particular, two null arrays of the same type are always equal."

So in the case of numeric_bit, it does not have to conform to the LRM statement?

Richard Head
@trickyhead_gitlab
this is likely a case where the implicit "=" function is overloaded
sckoarn
@sckoarn
numeric_bit defines a new "=" for sure, but does that mean that it does not have to meet the statement in the LRM. I mean that statement is not hard to understand.
Richard Head
@trickyhead_gitlab
The LRM only defines the behaviour for implicit operators
overloaded versions can do what they want
sckoarn
@sckoarn
ok
Richard Head
@trickyhead_gitlab
otherwise half of numeric_std would be against the LRM
sckoarn
@sckoarn
yes that is what I was hoping was NOT the case.
so New packages not defined in the LRM can do what ever they want.
Richard Head
@trickyhead_gitlab

Two composite values of the same type are equal if and only if for each element of the left operand there is a matching element of the right operand and vice versa, and the values of matching elements are equal, as given by the predefined equality operator for the element type

In Numeric_std you can compare two arrays of missmatched length and get TRUE, the implicit version would always be FALSE

sckoarn
@sckoarn
ok, That clears it up for me.
Thanks
Richard Head
@trickyhead_gitlab
@sckoarn you mean any overloaded functions as numeric_std is defined in the LRM
sckoarn
@sckoarn
Over loaded or not, if I create a package, LRM rules do not apply
As the LRM I was looking at were specific to implicit.
Richard Head
@trickyhead_gitlab
@sckoarn the part of the lrm you were refering to was for operators implicitly declared when you declare a type. you could declare a type in a package without overloading it and hence the visible operators would be the implicit ones. If you provide an overloaded version in the same package as the type, then you can no longer access the implicit function by any means.
sckoarn
@sckoarn
@trickyhead_gitlab Thanks for the details, it is nice to have some to go over this kind of stuff.
sckoarn
@sckoarn

A numeric_bit package function:

  -- Id: A.29
  function "rem" (L : UNSIGNED; R : NATURAL) return UNSIGNED is
    constant R_LENGTH : NATURAL := MAXIMUM(L'length, UNSIGNED_NUM_BITS(R));
    variable XR, XREM : UNSIGNED(R_LENGTH-1 downto 0);
  begin
    if (L'length < 1) then return NAU;
    end if;
    XR   := TO_UNSIGNED(R, R_LENGTH);
    XREM := RESIZE((L rem XR), XREM'length);
    if R_LENGTH > L'length and XREM(R_LENGTH-1 downto L'length)
      /= (R_LENGTH-1 downto L'length => '0')
    then
      assert NO_WARNING report "NUMERIC_BIT.""rem"": Remainder Truncated"        ---<<<<  How to get here?
        severity warning;
    end if;
    return RESIZE(XREM, L'length);
  end function "rem";

Can anyone tell me how I can get that assert to fire?

We believe this is dead code.
Unai Martinez-Corral
@umarcor
@sckoarn did you report similar possibly dead snippets before? If it wasn't you, done other user did it in the last months. There should be some issue about it in Gitlab.
sckoarn
@sckoarn
yes I have.
Unai Martinez-Corral
@umarcor
*some other
sckoarn
@sckoarn
I lost track of the link, it got moved from my original posting location.
Unai Martinez-Corral
@umarcor
That's the MR I created. This is the issue: IEEE-P1076/VHDL-Issues#267
sckoarn
@sckoarn
Perfect Thanks.
Unai Martinez-Corral
@umarcor
I had some errors in CI but I did not have time to check.
sckoarn
@sckoarn
Should I add to that one, or create a new one? looks like it is going to be merged?
Unai Martinez-Corral
@umarcor
So, the MR is a placeholder. Feel free to pick it and do further tests
sckoarn
@sckoarn
sorry, MR?
merge request ...
Unai Martinez-Corral
@umarcor
It's normative, so it won't be merged until it's discussed in a meeting
MR: Merge Request. Gitlab's equivalent to Github' PR (pull request)
sckoarn
@sckoarn
Yes, ok I had full details of every line from before. I am not at that state yet. Should I wait till I can provide full details?
Mid next week I expect to be done with numeric_bit.
Kaleb Barrett
@ktbarrett
Why is case not a concurrent statement?
when statement chains are super readable.
Brian Padalino
@bpadalino
aren't you able to use when statements outside of a process ?
Kaleb Barrett
@ktbarrett
That's what I'm complaining about. I don't enjoy making when statement chains compared to just writing a case statement
Brian Padalino
@bpadalino
then wrap your case in a process(all) statement
doesn't that solve the issue?
Kaleb Barrett
@ktbarrett

just add more code

Awesome

Brian Padalino
@bpadalino
process(all) case ... end case ; end process; is too much?
the with/select statement is the same as the case except with a slightly different syntax, the same readibility of the case/when, and is concurrent
why is with/select not the solution you want ?
Brian Padalino
@bpadalino
i think the crux of it, from a language standpoint, is that case statements can assign to all sorts of signals .. not just a single one .. so with/select assigns to a single signal .. adding case in a concurrent manner would really screw with that
so if you just prefer reading the case statement, and are only assigning to a single signal, then living with having to write 3 extra lines of code for a style preference doesn't seem like too bad of a compromise