<mrexodia> It’s in settings (re @ARCHANGEL_ahteam: Hi, guys. Maybe somebody knows is it possible to disable logging the exceptions into main log window?)
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<ARCHANGEL_ahteam> Could you point where is it in a bit more details? (re @mrexodia: It’s in settings)
<mrexodia> On the phone
<mrexodia> Looking at the 5 settings tabs might help
<mrexodia> Probably it has “exception” in the name
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<Prassert> My main problem is on $result variable I have allocated memory and I want copy bytes there into &result var I cant figure that out (re @mrexodia: What doesn’t work?)
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<mrexodia> DbgMemWrite? (re @Prassert: My main problem is on $result variable I have allocated memory and I want copy bytes there into &result var I cant figure that out)
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<ARCHANGEL_ahteam> Yes, Options -> Preferences -> Exceptions, than it important to choose type of exception in the list (if some of them are already there), and remove checkbox on logging option. Maybe it would be helpful to others. (re @mrexodia: Looking at the 5 settings tabs might help)
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<EvilSapphire> Why does the gs, fs registers always have fixed values 2b and 53 which arent real memory locations, but when i follow the tib address in the dump from an assembly instruction like gs[0] it would take me to a mapped address? I know gs is a segment register, but how does x64dbg calculate the gs:0 memory location?
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<ARCHANGEL_ahteam> Segment register points to structure called selector. Selector now usually describes the whole flat memory so it is not important what actually value is set to segment register because all of them (if they are valid) discribes the whole address space. So the beginning of address space extracts from selector and offset adds to it after : . 0 on your case. Intel manuals have more detailed description (re @EvilSapphire: Why does the gs, fs registers always have fixed values 2b and 53 which arent real memory locations, but when i follow the tib address in the dump from an assembly instruction like gs[0] it would take me to a mapped address? I know gs is a segment register, but how does x64dbg calculate the gs:0 memory location?)
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<EvilSapphire> I know this is asking a lot, but how does this work with paging? Does the segment:offset gives us a final virtual address which is then translated to physical address via a page table. It's so hard to get a concise, bird's eye view of this process on the internet. (re @ARCHANGEL_ahteam: Segment register points to structure called selector. Selector now usually describes the whole flat memory so it is not important what actually value is set to segment register because all of them (if they are valid) discribes the whole address space. So the beginning of address space extracts from selector and offset adds to it after : . 0 on your case. Intel manuals have more detailed description)
<mrexodia> https://wiki.osdev.org/Global_Descriptor_Table (re @EvilSapphire: I know this is asking a lot, but how does this work with paging? Does the segment:offset gives us a final virtual address which is then translated to physical address via a page table. It's so hard to get a concise, bird's eye view of this process on the internet.)
<mrexodia> I've been meaning to write a blog post about it
<mrexodia> on 64-bit it's all a bit simpler, but you have a GDT which contains descriptors about the memory
<mrexodia> the segment register is an offset in this table
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<mrexodia> x64dbg doesn't know about any of this though, the FS/GS segment is simply translated to the TEB base
<prnggod> anyone has access to armadillo protector? different versions? I'm studying software protection systems. I recently came across this challenge that is based on armadillo protector's system and I wanna see how the actual software worked
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<ARCHANGEL_ahteam> Google is your friend (re @prnggod: anyone has access to armadillo protector? different versions? I'm studying software protection systems. I recently came across this challenge that is based on armadillo protector's system and I wanna see how the actual software worked)